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An Integrated System-on-Chip Test Framework

Larsson, Erik LU and Peng, Zebo (2008) In [Host publication title missing] p.439-454
Abstract
In this paper we propose a framework for the testing of system-on-chip (SOC), which includes a set of design algorithms to deal with test scheduling, test access mechanism design, test sets selection, test parallelization, and test resource placement. The approach minimizes the test application time and the cost of the test access mechanism while considering constraints on tests, power consumption and test resources. The main feature of our approach is that it provides an integrated design environment to treat several different tasks at the same time, which were traditionally dealt with as separate problems. Experimental results shows the efficiency and the usefulness of the proposed technique.
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author
publishing date
type
Chapter in Book/Report/Conference proceeding
publication status
published
subject
keywords
testing, system-on-chip, SOC, framework, integrated testing
in
[Host publication title missing]
pages
439 - 454
publisher
Springer
external identifiers
  • scopus:84895307459
ISBN
978-1-4020-6487-6
language
English
LU publication?
no
id
ff83144a-1211-4d33-bb45-361ffe019539 (old id 2340976)
alternative location
http://www.springer.com/east/home?SGWID=5-102-22-173748414-0&changeHeader=true&SHORTCUT=www.springer.com/978-1-4020-6487-6
date added to LUP
2012-02-10 13:42:13
date last changed
2017-01-01 08:00:46
@inbook{ff83144a-1211-4d33-bb45-361ffe019539,
  abstract     = {In this paper we propose a framework for the testing of system-on-chip (SOC), which includes a set of design algorithms to deal with test scheduling, test access mechanism design, test sets selection, test parallelization, and test resource placement. The approach minimizes the test application time and the cost of the test access mechanism while considering constraints on tests, power consumption and test resources. The main feature of our approach is that it provides an integrated design environment to treat several different tasks at the same time, which were traditionally dealt with as separate problems. Experimental results shows the efficiency and the usefulness of the proposed technique.},
  author       = {Larsson, Erik and Peng, Zebo},
  isbn         = {978-1-4020-6487-6},
  keyword      = {testing,system-on-chip,SOC,framework,integrated testing},
  language     = {eng},
  pages        = {439--454},
  publisher    = {Springer},
  series       = {[Host publication title missing]},
  title        = {An Integrated System-on-Chip Test Framework},
  year         = {2008},
}