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Highly integrated direct conversion receiver for GSM/GPRS/EDGE with on-chip 84-dB dynamic range continuous-time ΣΔ ADC

Le Guillou, Y; Gaborieau, O; Gamand, P; Isberg, M; Jakobsson, P; Jonsson, L; Le Deaut, D; Marie, H; Mattisson, Sven LU and Monge, L, et al. (2005) In IEEE Journal of Solid-State Circuits 40(2). p.403-411
Abstract
This paper describes a highly digitized direct conversion receiver of a single-chip quadruple-band RF transceiver that meets GSM/GPRS and EDGE requirements. The chip uses an advanced 0.25-mum BiCMOS technology. The I and Q on-chip fifth-order single-bit continuous-time sigma-delta (SigmaDelta) ADC has 84-dB dynamic range over a total bandwidth of +/-135 kHz for an active area of 0.4 mm(2). Hence, most of the channel filtering is realized in a CMOS IC where digital processing-is achieved at a lower cost. The systematic analysis of dc offset at each stage of the design enables to perform the dc offset cancellation loop in the digital domain as well. The receiver operates at 2.7 V with a current consumption of 75 mA. A first-order substrate... (More)
This paper describes a highly digitized direct conversion receiver of a single-chip quadruple-band RF transceiver that meets GSM/GPRS and EDGE requirements. The chip uses an advanced 0.25-mum BiCMOS technology. The I and Q on-chip fifth-order single-bit continuous-time sigma-delta (SigmaDelta) ADC has 84-dB dynamic range over a total bandwidth of +/-135 kHz for an active area of 0.4 mm(2). Hence, most of the channel filtering is realized in a CMOS IC where digital processing-is achieved at a lower cost. The systematic analysis of dc offset at each stage of the design enables to perform the dc offset cancellation loop in the digital domain as well. The receiver operates at 2.7 V with a current consumption of 75 mA. A first-order substrate coupling analysis enables to optimize the floor plan strategy. As a result, the receiver has an area of 1.8 mm(2). (Less)
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organization
publishing date
type
Contribution to journal
publication status
published
subject
keywords
IIP2, GSM, GPRS, front-end, EDGE, direct conversion, dc offset, continuous time, analog-to-digital conversion, BiCMOS, low-noise, amplifier (LNA), mixer, self-mixing, sigma-delta (Sigma Delta)
in
IEEE Journal of Solid-State Circuits
volume
40
issue
2
pages
403 - 411
publisher
IEEE--Institute of Electrical and Electronics Engineers Inc.
external identifiers
  • wos:000226616900005
  • scopus:13444273330
ISSN
0018-9200
DOI
10.1109/JSSC.2004.841036
language
English
LU publication?
yes
id
9d6edce3-7655-4d5f-9725-98b7852b0ee3 (old id 254900)
date added to LUP
2007-08-14 14:34:49
date last changed
2017-10-08 04:09:12
@article{9d6edce3-7655-4d5f-9725-98b7852b0ee3,
  abstract     = {This paper describes a highly digitized direct conversion receiver of a single-chip quadruple-band RF transceiver that meets GSM/GPRS and EDGE requirements. The chip uses an advanced 0.25-mum BiCMOS technology. The I and Q on-chip fifth-order single-bit continuous-time sigma-delta (SigmaDelta) ADC has 84-dB dynamic range over a total bandwidth of +/-135 kHz for an active area of 0.4 mm(2). Hence, most of the channel filtering is realized in a CMOS IC where digital processing-is achieved at a lower cost. The systematic analysis of dc offset at each stage of the design enables to perform the dc offset cancellation loop in the digital domain as well. The receiver operates at 2.7 V with a current consumption of 75 mA. A first-order substrate coupling analysis enables to optimize the floor plan strategy. As a result, the receiver has an area of 1.8 mm(2).},
  author       = {Le Guillou, Y and Gaborieau, O and Gamand, P and Isberg, M and Jakobsson, P and Jonsson, L and Le Deaut, D and Marie, H and Mattisson, Sven and Monge, L and Olsson, T and Prouet, S and Tired, T},
  issn         = {0018-9200},
  keyword      = {IIP2,GSM,GPRS,front-end,EDGE,direct conversion,dc offset,continuous time,analog-to-digital conversion,BiCMOS,low-noise,amplifier (LNA),mixer,self-mixing,sigma-delta (Sigma Delta)},
  language     = {eng},
  number       = {2},
  pages        = {403--411},
  publisher    = {IEEE--Institute of Electrical and Electronics Engineers Inc.},
  series       = {IEEE Journal of Solid-State Circuits},
  title        = {Highly integrated direct conversion receiver for GSM/GPRS/EDGE with on-chip 84-dB dynamic range continuous-time ΣΔ ADC},
  url          = {http://dx.doi.org/10.1109/JSSC.2004.841036},
  volume       = {40},
  year         = {2005},
}