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Constraint Programming Approach to Reconfigurable Processor Extension Generation and Application Compilation

Martin, Kevin; Wolinski, Christophe; Kuchcinski, Krzysztof LU ; Floch, Antoine and Charot, Francois (2012) In ACM Transactions on Reconfigurable Technology and Systems 5(2). p.1-38
Abstract (Swedish)
Abstract in Undetermined

In this article, we present a constraint programming approach for solving hard design problems present when automatically designing specialized processor extensions. Specifically, we discuss our approach for automatic selection and synthesis of processor extensions as well as efficient application compilation for these newly generated extensions. The discussed approach is implemented in our integrated design framework, IFPEC, built using Constraint Programming (CP). In our framework, custom instructions, implemented as processor extensions, are defined as computational patterns and represented as graphs. This, along with the graph representation of an application, provides a way to use our CP... (More)
Abstract in Undetermined

In this article, we present a constraint programming approach for solving hard design problems present when automatically designing specialized processor extensions. Specifically, we discuss our approach for automatic selection and synthesis of processor extensions as well as efficient application compilation for these newly generated extensions. The discussed approach is implemented in our integrated design framework, IFPEC, built using Constraint Programming (CP). In our framework, custom instructions, implemented as processor extensions, are defined as computational patterns and represented as graphs. This, along with the graph representation of an application, provides a way to use our CP framework equipped with subgraph isomorphism and connected component constraints for identification of processor extensions as well as their selection, application scheduling, binding, and routing. All design steps assume architectures composed of runtime reconfigurable cells, implementing selected extensions, tightly connected to a processor. An advantage of our approach is the possibility of combining different heterogeneous constraints to represent and solve all our design problems. Moreover, the flexibility and expressiveness of the CP framework makes it possible to solve simultaneously extension selection, application scheduling, and binding and improve the quality of the generated results. The article is largely illustrated with experimental results. (Less)
Please use this url to cite or link to this publication:
author
organization
publishing date
type
Contribution to journal
publication status
published
subject
in
ACM Transactions on Reconfigurable Technology and Systems
volume
5
issue
2
pages
1 - 38
publisher
ACM
external identifiers
  • wos:000305864100004
  • scopus:84867544588
ISSN
1936-7406
DOI
10.1145/2209285.2209289
project
HiPEC
EASE
language
English
LU publication?
yes
id
ffb03964-6bb2-445e-a54b-745b09dbba26 (old id 2797182)
date added to LUP
2012-06-27 09:57:43
date last changed
2017-08-20 03:19:30
@article{ffb03964-6bb2-445e-a54b-745b09dbba26,
  abstract     = {<b>Abstract in Undetermined</b><br/><br>
In this article, we present a constraint programming approach for solving hard design problems present when automatically designing specialized processor extensions. Specifically, we discuss our approach for automatic selection and synthesis of processor extensions as well as efficient application compilation for these newly generated extensions. The discussed approach is implemented in our integrated design framework, IFPEC, built using Constraint Programming (CP). In our framework, custom instructions, implemented as processor extensions, are defined as computational patterns and represented as graphs. This, along with the graph representation of an application, provides a way to use our CP framework equipped with subgraph isomorphism and connected component constraints for identification of processor extensions as well as their selection, application scheduling, binding, and routing. All design steps assume architectures composed of runtime reconfigurable cells, implementing selected extensions, tightly connected to a processor. An advantage of our approach is the possibility of combining different heterogeneous constraints to represent and solve all our design problems. Moreover, the flexibility and expressiveness of the CP framework makes it possible to solve simultaneously extension selection, application scheduling, and binding and improve the quality of the generated results. The article is largely illustrated with experimental results.},
  author       = {Martin, Kevin and Wolinski, Christophe and Kuchcinski, Krzysztof and Floch, Antoine and Charot, Francois},
  issn         = {1936-7406},
  language     = {eng},
  number       = {2},
  pages        = {1--38},
  publisher    = {ACM},
  series       = {ACM Transactions on Reconfigurable Technology and Systems},
  title        = {Constraint Programming Approach to Reconfigurable Processor Extension Generation and Application Compilation},
  url          = {http://dx.doi.org/10.1145/2209285.2209289},
  volume       = {5},
  year         = {2012},
}