A simplified computational kernel for trellis-based decoding
(2004) In IEEE Communications Letters 8(3). p.156-158- Abstract
- A simplified branch metric and add-compare-select (ACS) unit is presented for use in trellis-based decoding architectures. The simplification is based on a complementary property of best feedforward and some systematic feedback encoders. As a result, one adder is saved in every other ACS unit. Furthermore, only half the branch metrics have to be calculated. It is shown that this simplification becomes especially beneficial for rate 1/2 convolutional codes. Consequently, area and power consumption will be reduced in a hardware implementation.
Please use this url to cite or link to this publication:
https://lup.lub.lu.se/record/283654
- author
- Kamuf, Matthias LU ; Anderson, John B LU and Öwall, Viktor LU
- organization
- publishing date
- 2004
- type
- Contribution to journal
- publication status
- published
- subject
- keywords
- very large-scale, Viterbi decoding, integration (VLSI), logMAP, branch metric, add-compare-select (ACS)
- in
- IEEE Communications Letters
- volume
- 8
- issue
- 3
- pages
- 156 - 158
- publisher
- IEEE - Institute of Electrical and Electronics Engineers Inc.
- external identifiers
-
- wos:000220476600010
- scopus:1942455869
- ISSN
- 1089-7798
- DOI
- 10.1109/LCOMM.2004.825743
- project
- Digital ASIC: Flexible Coding and Decoding for Wireless Personal Area Networks
- language
- English
- LU publication?
- yes
- id
- 109acfc4-42ea-44b6-a8bc-4e85a8078305 (old id 283654)
- date added to LUP
- 2016-04-01 16:35:40
- date last changed
- 2022-01-28 20:45:00
@article{109acfc4-42ea-44b6-a8bc-4e85a8078305, abstract = {{A simplified branch metric and add-compare-select (ACS) unit is presented for use in trellis-based decoding architectures. The simplification is based on a complementary property of best feedforward and some systematic feedback encoders. As a result, one adder is saved in every other ACS unit. Furthermore, only half the branch metrics have to be calculated. It is shown that this simplification becomes especially beneficial for rate 1/2 convolutional codes. Consequently, area and power consumption will be reduced in a hardware implementation.}}, author = {{Kamuf, Matthias and Anderson, John B and Öwall, Viktor}}, issn = {{1089-7798}}, keywords = {{very large-scale; Viterbi decoding; integration (VLSI); logMAP; branch metric; add-compare-select (ACS)}}, language = {{eng}}, number = {{3}}, pages = {{156--158}}, publisher = {{IEEE - Institute of Electrical and Electronics Engineers Inc.}}, series = {{IEEE Communications Letters}}, title = {{A simplified computational kernel for trellis-based decoding}}, url = {{https://lup.lub.lu.se/search/files/4718819/1580337.pdf}}, doi = {{10.1109/LCOMM.2004.825743}}, volume = {{8}}, year = {{2004}}, }