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High-level system synthesis and optimization of dataflow programs for MPSoCs

Bezati, Endri ; Brunet, Simone Casale ; Mattavelli, Marco and Janneck, J. W. LU (2017) 50th Asilomar Conference on Signals, Systems and Computers, ACSSC 2016 p.417-421
Abstract

The growing complexity of digital signal processing applications make a compelling case the use of high-level design and synthesis methodologies for the implementation on reconfigurable and embedded devices. Past research has shown that raising the level of abstraction of design stages does not necessarily gives penalties in terms of performance or resources. Dataflow programs provide behavioral descriptions capable of expressing both sequential and parallel algorithms and enable natural design abstractions, modularity, and portability. In this paper, a tool implementing dataflow programs onto embedded heterogeneous platforms by means of high-level synthesis, software synthesis and interface synthesis is presented for MPSoCs... (More)

The growing complexity of digital signal processing applications make a compelling case the use of high-level design and synthesis methodologies for the implementation on reconfigurable and embedded devices. Past research has shown that raising the level of abstraction of design stages does not necessarily gives penalties in terms of performance or resources. Dataflow programs provide behavioral descriptions capable of expressing both sequential and parallel algorithms and enable natural design abstractions, modularity, and portability. In this paper, a tool implementing dataflow programs onto embedded heterogeneous platforms by means of high-level synthesis, software synthesis and interface synthesis is presented for MPSoCs platfroms.

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Please use this url to cite or link to this publication:
author
; ; and
organization
publishing date
type
Chapter in Book/Report/Conference proceeding
publication status
published
subject
host publication
50th Asilomar Conference on Signals, Systems and Computers, ACSSC 2016
article number
7869072
pages
5 pages
publisher
IEEE Computer Society
conference name
50th Asilomar Conference on Signals, Systems and Computers, ACSSC 2016
conference location
Pacific Grove, United States
conference dates
2016-11-06 - 2016-11-09
external identifiers
  • scopus:85016303112
ISBN
9781538639542
DOI
10.1109/ACSSC.2016.7869072
language
English
LU publication?
yes
id
29b022f0-f4c3-40c7-874a-129b8f4e4ebd
date added to LUP
2017-04-13 08:31:55
date last changed
2022-04-24 23:14:56
@inproceedings{29b022f0-f4c3-40c7-874a-129b8f4e4ebd,
  abstract     = {{<p>The growing complexity of digital signal processing applications make a compelling case the use of high-level design and synthesis methodologies for the implementation on reconfigurable and embedded devices. Past research has shown that raising the level of abstraction of design stages does not necessarily gives penalties in terms of performance or resources. Dataflow programs provide behavioral descriptions capable of expressing both sequential and parallel algorithms and enable natural design abstractions, modularity, and portability. In this paper, a tool implementing dataflow programs onto embedded heterogeneous platforms by means of high-level synthesis, software synthesis and interface synthesis is presented for MPSoCs platfroms.</p>}},
  author       = {{Bezati, Endri and Brunet, Simone Casale and Mattavelli, Marco and Janneck, J. W.}},
  booktitle    = {{50th Asilomar Conference on Signals, Systems and Computers, ACSSC 2016}},
  isbn         = {{9781538639542}},
  language     = {{eng}},
  month        = {{03}},
  pages        = {{417--421}},
  publisher    = {{IEEE Computer Society}},
  title        = {{High-level system synthesis and optimization of dataflow programs for MPSoCs}},
  url          = {{http://dx.doi.org/10.1109/ACSSC.2016.7869072}},
  doi          = {{10.1109/ACSSC.2016.7869072}},
  year         = {{2017}},
}