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A 38pJ/b Optimal Soft-MIMO Detector

Shabany, Mahdi; Doostnejad, Roya ; Mahdavi, Mojtaba LU and Gulak, Glenn (2017) In IEEE Transactions on Circuits and Systems II: Express Briefs p.1062-1066
Abstract
An optimal soft multiple-input multiple-output (MIMO) detector is proposed with linear complexity for a general spatial multiplexing system with two transmitting symbols and NR ≥ 2 receiving antennas. The computational complexity of the proposed scheme is independent of the operating signal-tonoise ratio (SNR) and grows linearly with the constellation order. It provides the soft maximum-likelihood (ML) solution using an efficient Log-Likelihood Ratio (LLR) calculation method, avoiding the exhaustive search on all the candidate nodes. Moreover, an efficient pipelined hardware implementation of the detection algorithm is proposed, which is fabricated and fully tested in a 130nm CMOS technology. Operating at 1.2 V supply with 412 MHz clock,... (More)
An optimal soft multiple-input multiple-output (MIMO) detector is proposed with linear complexity for a general spatial multiplexing system with two transmitting symbols and NR ≥ 2 receiving antennas. The computational complexity of the proposed scheme is independent of the operating signal-tonoise ratio (SNR) and grows linearly with the constellation order. It provides the soft maximum-likelihood (ML) solution using an efficient Log-Likelihood Ratio (LLR) calculation method, avoiding the exhaustive search on all the candidate nodes. Moreover, an efficient pipelined hardware implementation of the detection algorithm is proposed, which is fabricated and fully tested in a 130nm CMOS technology. Operating at 1.2 V supply with 412 MHz clock, the chip achieves up to 5 Gbps throughput with 192mW power dissipation and an energy efficiency of 38 pJ/b, showing a great potential to be used in next generation Gbps wireless systems. The proposed MIMO detector is perfectly suitable to be applied to the Long Term Evolution (LTE) modem as well as Wi-Fi and WiGig devices with more than 1 RF chain. Synthesis results in a 90nm CMOS technology demonstrates that the design can operate at a sustained throughput of 6.2 Gbps, and an energy efficiency of 28 pJ/b at 1.2 V supply. For applications demanding a lower throughput regime, the core can operate at 0.9 V supply consuming 42mW providing a throughput of 1 Gbps1. (Less)
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author
organization
publishing date
type
Contribution to journal
publication status
published
subject
in
IEEE Transactions on Circuits and Systems II: Express Briefs
pages
1062 - 1066
publisher
IEEE--Institute of Electrical and Electronics Engineers Inc.
external identifiers
  • scopus:85029588182
  • wos:000408771000014
DOI
10.1109/TCSII.2016.2641964
language
English
LU publication?
yes
id
2b209554-e486-45ab-8f84-e88a4529efab
date added to LUP
2016-12-24 15:11:04
date last changed
2018-03-02 09:16:44
@article{2b209554-e486-45ab-8f84-e88a4529efab,
  abstract     = {An optimal soft multiple-input multiple-output (MIMO) detector is proposed with linear complexity for a general spatial multiplexing system with two transmitting symbols and NR ≥ 2 receiving antennas. The computational complexity of the proposed scheme is independent of the operating signal-tonoise ratio (SNR) and grows linearly with the constellation order. It provides the soft maximum-likelihood (ML) solution using an efficient Log-Likelihood Ratio (LLR) calculation method, avoiding the exhaustive search on all the candidate nodes. Moreover, an efficient pipelined hardware implementation of the detection algorithm is proposed, which is fabricated and fully tested in a 130nm CMOS technology. Operating at 1.2 V supply with 412 MHz clock, the chip achieves up to 5 Gbps throughput with 192mW power dissipation and an energy efficiency of 38 pJ/b, showing a great potential to be used in next generation Gbps wireless systems. The proposed MIMO detector is perfectly suitable to be applied to the Long Term Evolution (LTE) modem as well as Wi-Fi and WiGig devices with more than 1 RF chain. Synthesis results in a 90nm CMOS technology demonstrates that the design can operate at a sustained throughput of 6.2 Gbps, and an energy efficiency of 28 pJ/b at 1.2 V supply. For applications demanding a lower throughput regime, the core can operate at 0.9 V supply consuming 42mW providing a throughput of 1 Gbps1.},
  author       = {Shabany, Mahdi and Doostnejad, Roya  and Mahdavi, Mojtaba and Gulak, Glenn },
  language     = {eng},
  pages        = {1062--1066},
  publisher    = {IEEE--Institute of Electrical and Electronics Engineers Inc.},
  series       = {IEEE Transactions on Circuits and Systems II: Express Briefs},
  title        = {A 38pJ/b Optimal Soft-MIMO Detector},
  url          = {http://dx.doi.org/10.1109/TCSII.2016.2641964},
  year         = {2017},
}