A 350μW Sign-Bit architecture for multi-parameter estimation during OFDM acquisition in 65nm CMOS
Diaz, Isael LU ; Tan, Siyu LU ; Miao, Yun ; Wilhelmsson, Leif ; Edfors, Ove LU
and Öwall, Viktor
LU
(2015)
IEEE International Symposium on Circuits and Systems (ISCAS), 2015
- Abstract
- Correct estimation of symbol timing, Carrier Frequency
Offset (CFO), and Signal-to-Noise Ratio (SNR) is crucial
in Orthogonal Frequency Division Multiplexing (OFDM) communication.
Typically, high estimation accuracy is desired, but often
comes with increased complexity. Which has a direct repercussion
in energy consumption. In this article, an architecture based on
Sign-Bit estimation with low complexity, and hence low power
dissipation, is presented. The architecture, is capable of estimating
the afore-mentioned parameters in virtually any OFDM
standard. The proof of concept has been fabricated in 65 nm
CMOS technology with low-power high-VT cells.... (More) - Correct estimation of symbol timing, Carrier Frequency
Offset (CFO), and Signal-to-Noise Ratio (SNR) is crucial
in Orthogonal Frequency Division Multiplexing (OFDM) communication.
Typically, high estimation accuracy is desired, but often
comes with increased complexity. Which has a direct repercussion
in energy consumption. In this article, an architecture based on
Sign-Bit estimation with low complexity, and hence low power
dissipation, is presented. The architecture, is capable of estimating
the afore-mentioned parameters in virtually any OFDM
standard. The proof of concept has been fabricated in 65 nm
CMOS technology with low-power high-VT cells. Measurements
performed with supply voltage of 1.2V. resulted in a power
dissipation of 350 μW, 6 times smaller to that of an equivalent
8-bit architecture, and the lowest power density reported in
literature. (Less)
Please use this url to cite or link to this publication:
https://lup.lub.lu.se/record/5051112
- author
- Diaz, Isael
LU
; Tan, Siyu
LU
; Miao, Yun
; Wilhelmsson, Leif
; Edfors, Ove
LU
and Öwall, Viktor
LU
- organization
- publishing date
- 2015
- type
- Chapter in Book/Report/Conference proceeding
- publication status
- published
- subject
- host publication
- 2015 IEEE International Symposium on Circuits and Systems (ISCAS)
- publisher
- IEEE - Institute of Electrical and Electronics Engineers Inc.
- conference name
- IEEE International Symposium on Circuits and Systems (ISCAS), 2015
- conference location
- Lisbon, Portugal
- conference dates
- 2015-05-24 - 2015-05-27
- external identifiers
-
- scopus:84946220449
- ISBN
- 978-1-4799-8391-9
- DOI
- 10.1109/ISCAS.2015.7169314
- language
- English
- LU publication?
- yes
- id
- 31be697a-0093-46dd-95d0-143c09cf1feb (old id 5051112)
- date added to LUP
- 2016-04-04 11:57:49
- date last changed
- 2024-02-28 22:09:06
@inproceedings{31be697a-0093-46dd-95d0-143c09cf1feb,
abstract = {{Correct estimation of symbol timing, Carrier Frequency<br/><br>
Offset (CFO), and Signal-to-Noise Ratio (SNR) is crucial<br/><br>
in Orthogonal Frequency Division Multiplexing (OFDM) communication.<br/><br>
Typically, high estimation accuracy is desired, but often<br/><br>
comes with increased complexity. Which has a direct repercussion<br/><br>
in energy consumption. In this article, an architecture based on<br/><br>
Sign-Bit estimation with low complexity, and hence low power<br/><br>
dissipation, is presented. The architecture, is capable of estimating<br/><br>
the afore-mentioned parameters in virtually any OFDM<br/><br>
standard. The proof of concept has been fabricated in 65 nm<br/><br>
CMOS technology with low-power high-VT cells. Measurements<br/><br>
performed with supply voltage of 1.2V. resulted in a power<br/><br>
dissipation of 350 μW, 6 times smaller to that of an equivalent<br/><br>
8-bit architecture, and the lowest power density reported in<br/><br>
literature.}},
author = {{Diaz, Isael and Tan, Siyu and Miao, Yun and Wilhelmsson, Leif and Edfors, Ove and Öwall, Viktor}},
booktitle = {{2015 IEEE International Symposium on Circuits and Systems (ISCAS)}},
isbn = {{978-1-4799-8391-9}},
language = {{eng}},
publisher = {{IEEE - Institute of Electrical and Electronics Engineers Inc.}},
title = {{A 350μW Sign-Bit architecture for multi-parameter estimation during OFDM acquisition in 65nm CMOS}},
url = {{http://dx.doi.org/10.1109/ISCAS.2015.7169314}},
doi = {{10.1109/ISCAS.2015.7169314}},
year = {{2015}},
}