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Synthesizing hardware from dataflow programs

Janneck, Jörn LU ; Miller, Ian D. ; Parlour, David B. ; Roquier, Ghislain ; Wipliez, Matthieu and Rauler, Mickaël (2011) In Journal of Signal Processing Systems 63(2). p.241-249
Abstract
Abstract in Undetermined
The MPEG Reconfigurable Video Coding
working group is developing a new library-based pro-
cess for building the reference codecs of future MPEG
standards, which is based on dataflow and uses an actor
language called Cal. The paper presents a code genera-
tor producing RTL targeting FPGAs for Cal, outlines
its structure, and demonstrates its performance on an
MPEG-4 Simple Profile decoder. The resulting imple-
mentation is smaller and faster than a comparable RTL
reference design, and the second half of the paper
discusses some of the reasons for this counter-intuitive
result.
Please use this url to cite or link to this publication:
author
; ; ; ; and
organization
publishing date
type
Contribution to journal
publication status
published
subject
in
Journal of Signal Processing Systems
volume
63
issue
2
pages
241 - 249
publisher
Springer
external identifiers
  • scopus:79954607461
ISSN
1939-8115
DOI
10.1007/s11265-009-0397-5
language
English
LU publication?
no
id
395a28c4-236e-41bd-8685-aafe5280bcee (old id 2224896)
date added to LUP
2016-04-01 09:50:56
date last changed
2025-04-04 15:19:12
@article{395a28c4-236e-41bd-8685-aafe5280bcee,
  abstract     = {{Abstract in Undetermined<br/>The MPEG Reconfigurable Video Coding<br/>working group is developing a new library-based pro-<br/>cess for building the reference codecs of future MPEG<br/>standards, which is based on dataflow and uses an actor<br/>language called Cal. The paper presents a code genera-<br/>tor producing RTL targeting FPGAs for Cal, outlines<br/>its structure, and demonstrates its performance on an<br/>MPEG-4 Simple Profile decoder. The resulting imple-<br/>mentation is smaller and faster than a comparable RTL<br/>reference design, and the second half of the paper<br/>discusses some of the reasons for this counter-intuitive<br/>result.}},
  author       = {{Janneck, Jörn and Miller, Ian D. and Parlour, David B. and Roquier, Ghislain and Wipliez, Matthieu and Rauler, Mickaël}},
  issn         = {{1939-8115}},
  language     = {{eng}},
  number       = {{2}},
  pages        = {{241--249}},
  publisher    = {{Springer}},
  series       = {{Journal of Signal Processing Systems}},
  title        = {{Synthesizing hardware from dataflow programs}},
  url          = {{https://lup.lub.lu.se/search/files/1314120/2224903.pdf}},
  doi          = {{10.1007/s11265-009-0397-5}},
  volume       = {{63}},
  year         = {{2011}},
}