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Implementation aspects of a novel speech packet loss concealment method

Svensson, Henrik LU ; Öwall, Viktor LU and Kuchcinski, Krzysztof LU orcid (2005) IEEE International Symposium on Circuits and Systems (ISCAS), 2005 p.2867-2870
Abstract
A speech data packet loss concealment algorithm based on pitch period repetition is presented and a novel low complexity method to refine a pitch period estimate is introduced. Objective performance measurements show that this pitch refinement improves the quality of packet loss concealment. Hardware-software codesign techniques have been investigated to implement the algorithm. Using a coprocessor approach, a processing delay of 0.9 ms and a overall speedup of 3.3 was achieved
Please use this url to cite or link to this publication:
author
; and
organization
publishing date
type
Chapter in Book/Report/Conference proceeding
publication status
published
subject
keywords
0.9 ms, speech data packet loss concealment, speech packet loss concealment method, pitch period repetition, pitch period estimation, complexity, coprocessor approach, hardware-software codesign
host publication
IEEE International Symposium on Circuits and Systems (ISCAS)
pages
2867 - 2870
publisher
IEEE - Institute of Electrical and Electronics Engineers Inc.
conference name
IEEE International Symposium on Circuits and Systems (ISCAS), 2005
conference location
Kobe, Japan
conference dates
2005-05-23 - 2005-05-26
external identifiers
  • wos:000232002402240
  • scopus:67649095318
ISBN
0-7803-8834-8
DOI
10.1109/ISCAS.2005.1465225
language
English
LU publication?
yes
id
39ef3462-641a-43de-9c70-2cb12b530a8e (old id 615521)
date added to LUP
2016-04-04 11:27:57
date last changed
2025-04-04 15:15:42
@inproceedings{39ef3462-641a-43de-9c70-2cb12b530a8e,
  abstract     = {{A speech data packet loss concealment algorithm based on pitch period repetition is presented and a novel low complexity method to refine a pitch period estimate is introduced. Objective performance measurements show that this pitch refinement improves the quality of packet loss concealment. Hardware-software codesign techniques have been investigated to implement the algorithm. Using a coprocessor approach, a processing delay of 0.9 ms and a overall speedup of 3.3 was achieved}},
  author       = {{Svensson, Henrik and Öwall, Viktor and Kuchcinski, Krzysztof}},
  booktitle    = {{IEEE International Symposium on Circuits and Systems (ISCAS)}},
  isbn         = {{0-7803-8834-8}},
  keywords     = {{0.9 ms; speech data packet loss concealment; speech packet loss concealment method; pitch period repetition; pitch period estimation; complexity; coprocessor approach; hardware-software codesign}},
  language     = {{eng}},
  pages        = {{2867--2870}},
  publisher    = {{IEEE - Institute of Electrical and Electronics Engineers Inc.}},
  title        = {{Implementation aspects of a novel speech packet loss concealment method}},
  url          = {{http://dx.doi.org/10.1109/ISCAS.2005.1465225}},
  doi          = {{10.1109/ISCAS.2005.1465225}},
  year         = {{2005}},
}