Providing flexibility in a convolutional encoder
(2003) IEEE International Symposium on Circuits and Systems (ISCAS '03), 2003 p.272-275- Abstract
- In future radio systems, flexible coding and decoding architectures will be required. In case of the latter, implementing architectural flexibility with regard to low power issues is a challenging task. The flexible encoding platform in this paper is a first step toward this envisioned decoder. It generates a wide class of codes, starting with convolutional codes. As an extension to this, turbo codes will be included by adding an interleaver. At this prototyping stage, the system is implemented on an FPGA. The decision to choose the observer canonical form is defended by a thorough investigation of its critical path properties. Proper configuration allows code rates of b/c, b=1 ... 15, c=2 ... 16, b<c. Power can be saved by shutting... (More)
- In future radio systems, flexible coding and decoding architectures will be required. In case of the latter, implementing architectural flexibility with regard to low power issues is a challenging task. The flexible encoding platform in this paper is a first step toward this envisioned decoder. It generates a wide class of codes, starting with convolutional codes. As an extension to this, turbo codes will be included by adding an interleaver. At this prototyping stage, the system is implemented on an FPGA. The decision to choose the observer canonical form is defended by a thorough investigation of its critical path properties. Proper configuration allows code rates of b/c, b=1 ... 15, c=2 ... 16, b<c. Power can be saved by shutting down unused system modules (Less)
Please use this url to cite or link to this publication:
https://lup.lub.lu.se/record/612726
- author
- Kamuf, Matthias LU ; Anderson, John B LU and Öwall, Viktor LU
- organization
- publishing date
- 2003
- type
- Chapter in Book/Report/Conference proceeding
- publication status
- published
- subject
- keywords
- low power systems, convolutional codes, turbo codes, FPGA implementation, interleaver, observer canonical form critical path properties, code rates, unused system module shut down, wireless personal area networks, radio systems, flexible coding/decoding architectures, convolutional encoder flexibility, WPAN, power saving
- host publication
- Proceedings of the 2003 IEEE International Symposium on Circuits and Systems (Cat. No.03CH37430)
- pages
- 4 pages
- publisher
- IEEE - Institute of Electrical and Electronics Engineers Inc.
- conference name
- IEEE International Symposium on Circuits and Systems (ISCAS '03), 2003
- conference location
- Bangkok, Thailand
- conference dates
- 2003-05-25 - 2003-05-28
- external identifiers
-
- wos:000184781400069
- scopus:0037746698
- ISBN
- 0-7803-7761-3
- DOI
- 10.1109/ISCAS.2003.1205959
- language
- English
- LU publication?
- yes
- id
- 3c45075b-14fb-4a59-9047-ba637bcd9ee4 (old id 612726)
- date added to LUP
- 2016-04-04 11:23:10
- date last changed
- 2022-04-24 00:35:29
@inproceedings{3c45075b-14fb-4a59-9047-ba637bcd9ee4, abstract = {{In future radio systems, flexible coding and decoding architectures will be required. In case of the latter, implementing architectural flexibility with regard to low power issues is a challenging task. The flexible encoding platform in this paper is a first step toward this envisioned decoder. It generates a wide class of codes, starting with convolutional codes. As an extension to this, turbo codes will be included by adding an interleaver. At this prototyping stage, the system is implemented on an FPGA. The decision to choose the observer canonical form is defended by a thorough investigation of its critical path properties. Proper configuration allows code rates of b/c, b=1 ... 15, c=2 ... 16, b<c. Power can be saved by shutting down unused system modules}}, author = {{Kamuf, Matthias and Anderson, John B and Öwall, Viktor}}, booktitle = {{Proceedings of the 2003 IEEE International Symposium on Circuits and Systems (Cat. No.03CH37430)}}, isbn = {{0-7803-7761-3}}, keywords = {{low power systems; convolutional codes; turbo codes; FPGA implementation; interleaver; observer canonical form critical path properties; code rates; unused system module shut down; wireless personal area networks; radio systems; flexible coding/decoding architectures; convolutional encoder flexibility; WPAN; power saving}}, language = {{eng}}, pages = {{272--275}}, publisher = {{IEEE - Institute of Electrical and Electronics Engineers Inc.}}, title = {{Providing flexibility in a convolutional encoder}}, url = {{https://lup.lub.lu.se/search/files/5761563/634079.pdf}}, doi = {{10.1109/ISCAS.2003.1205959}}, year = {{2003}}, }