A 0.7 - 3.7 GHz Six Phase Receiver Front-End With Third Order Harmonic Rejection
(2013) IEEE European Solid State Circuits Conference, ESSCIRC 2013- Abstract
- This paper presents a highly linear receiver frontend
operating from 700 MHz to 3.7 GHz with 3rd order harmonic
rejection. It consists of a complementary low noise transconductance
amplifier with capacitive cross coupling and negative gm
current sources, a six phase current-mode passive mixer, and
baseband transimpedance amplifiers providing programmable
gain. The circuit has been fabricated in 65 nm CMOS technology
with an active area of just 0.09 mm2. It consumes 7.2 mA,
excluding the six phase local oscillator generation, from a 1.2 V
supply, achieving a third order harmonic rejection of 40 dB, and
a noise figure of 3 to 4.5 dB at 52 dB gain. The... (More) - This paper presents a highly linear receiver frontend
operating from 700 MHz to 3.7 GHz with 3rd order harmonic
rejection. It consists of a complementary low noise transconductance
amplifier with capacitive cross coupling and negative gm
current sources, a six phase current-mode passive mixer, and
baseband transimpedance amplifiers providing programmable
gain. The circuit has been fabricated in 65 nm CMOS technology
with an active area of just 0.09 mm2. It consumes 7.2 mA,
excluding the six phase local oscillator generation, from a 1.2 V
supply, achieving a third order harmonic rejection of 40 dB, and
a noise figure of 3 to 4.5 dB at 52 dB gain. The out of band IIP2
and IIP3 at full gain is +55 dBm and +5 dBm, respectively. (Less)
Please use this url to cite or link to this publication:
https://lup.lub.lu.se/record/4022933
- author
- Nejdel, Anders LU ; Törmänen, Markus LU and Sjöland, Henrik LU
- organization
- publishing date
- 2013
- type
- Chapter in Book/Report/Conference proceeding
- publication status
- published
- subject
- host publication
- IEEE
- pages
- 4 pages
- conference name
- IEEE European Solid State Circuits Conference, ESSCIRC 2013
- conference location
- Bucharest, Romania
- conference dates
- 2013-09-16 - 2013-09-20
- external identifiers
-
- scopus:84891108589
- DOI
- 10.1109/ESSCIRC.2013.6649127
- project
- EIT_DARE Digitally-Assisted Radio Evolution
- language
- English
- LU publication?
- yes
- id
- 27394246-72a5-4cc2-b15f-8a0f7ead0b89 (old id 4022933)
- date added to LUP
- 2016-04-04 13:08:44
- date last changed
- 2024-01-13 06:07:54
@inproceedings{27394246-72a5-4cc2-b15f-8a0f7ead0b89, abstract = {{This paper presents a highly linear receiver frontend<br/><br> operating from 700 MHz to 3.7 GHz with 3rd order harmonic<br/><br> rejection. It consists of a complementary low noise transconductance<br/><br> amplifier with capacitive cross coupling and negative gm<br/><br> current sources, a six phase current-mode passive mixer, and<br/><br> baseband transimpedance amplifiers providing programmable<br/><br> gain. The circuit has been fabricated in 65 nm CMOS technology<br/><br> with an active area of just 0.09 mm2. It consumes 7.2 mA,<br/><br> excluding the six phase local oscillator generation, from a 1.2 V<br/><br> supply, achieving a third order harmonic rejection of 40 dB, and<br/><br> a noise figure of 3 to 4.5 dB at 52 dB gain. The out of band IIP2<br/><br> and IIP3 at full gain is +55 dBm and +5 dBm, respectively.}}, author = {{Nejdel, Anders and Törmänen, Markus and Sjöland, Henrik}}, booktitle = {{IEEE}}, language = {{eng}}, title = {{A 0.7 - 3.7 GHz Six Phase Receiver Front-End With Third Order Harmonic Rejection}}, url = {{http://dx.doi.org/10.1109/ESSCIRC.2013.6649127}}, doi = {{10.1109/ESSCIRC.2013.6649127}}, year = {{2013}}, }