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A 35 fJ/bit-access Sub-VT Memory Using a Dual-Bit Area-Optimized Standard-cell in 65 nm CMOS

Andersson, Oskar LU ; Mohammadi, Babak LU ; Meinerzhagen, Pascal and Rodrigues, Joachim LU (2014) European Solid State Circuits Conference (ESSCIRC), 2014 In [Host publication title missing] p.243-246
Please use this url to cite or link to this publication:
author
organization
publishing date
type
Chapter in Book/Report/Conference proceeding
publication status
published
subject
in
[Host publication title missing]
pages
243 - 246
publisher
IEEE--Institute of Electrical and Electronics Engineers Inc.
conference name
European Solid State Circuits Conference (ESSCIRC), 2014
external identifiers
  • wos:000349461900055
  • scopus:84909980043
ISSN
1930-8833
DOI
10.1109/ESSCIRC.2014.6942067
language
English
LU publication?
yes
id
70038085-49f1-493e-80b4-1a3a3ffdfbd8 (old id 4451824)
date added to LUP
2014-06-02 14:18:01
date last changed
2017-06-11 04:12:49
@inproceedings{70038085-49f1-493e-80b4-1a3a3ffdfbd8,
  author       = {Andersson, Oskar and Mohammadi, Babak and Meinerzhagen, Pascal and Rodrigues, Joachim},
  booktitle    = {[Host publication title missing]},
  issn         = {1930-8833},
  language     = {eng},
  pages        = {243--246},
  publisher    = {IEEE--Institute of Electrical and Electronics Engineers Inc.},
  title        = {A 35 fJ/bit-access Sub-VT Memory Using a Dual-Bit Area-Optimized Standard-cell in 65 nm CMOS},
  url          = {http://dx.doi.org/10.1109/ESSCIRC.2014.6942067},
  year         = {2014},
}