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A constructive algorithm for memory-aware task assignment and scheduling

Szymanek, Radoslaw LU and Kuchcinski, Krzysztof LU (2001) In Proceedings of the Ninth International Symposium on Hardware/Software Codesign p.147-152
Abstract
This paper presents a constructive algorithm for memory-aware task assignment and scheduling, which is a part of the prototype system MATAS. The algorithm is well suited for image and video processing applications which have hard memory constraints as well as constraints on cost, execution time, and resource usage. Our algorithm takes into account code and data memory constraints together with the other constraints. It can create pipelined implementations. The algorithm finds a task assignment, a schedule, and data and code memory placement in memory. Infeasible solutions caused by memory fragmentation are avoided. The experiments show that our memory-aware algorithm reduces memory utilization compared to greedy scheduling algorithm which... (More)
This paper presents a constructive algorithm for memory-aware task assignment and scheduling, which is a part of the prototype system MATAS. The algorithm is well suited for image and video processing applications which have hard memory constraints as well as constraints on cost, execution time, and resource usage. Our algorithm takes into account code and data memory constraints together with the other constraints. It can create pipelined implementations. The algorithm finds a task assignment, a schedule, and data and code memory placement in memory. Infeasible solutions caused by memory fragmentation are avoided. The experiments show that our memory-aware algorithm reduces memory utilization compared to greedy scheduling algorithm which has time minimization objective. Moreover, memory-aware algorithm is able to find task assignment and schedule when time minimization algorithm fails. MATAS can create pipelined implementations, therefore the design throughput is increased. (Less)
Please use this url to cite or link to this publication:
author
organization
publishing date
type
Chapter in Book/Report/Conference proceeding
publication status
published
subject
in
Proceedings of the Ninth International Symposium on Hardware/Software Codesign
pages
147 - 152
external identifiers
  • Scopus:0034834711
ISBN
1-58113-364-2
DOI
10.1109/HSC.2001.924666
language
English
LU publication?
yes
id
e515f77a-de45-4cf9-8873-7754cda56b45 (old id 525824)
date added to LUP
2007-09-25 12:01:25
date last changed
2017-02-19 04:34:49
@inproceedings{e515f77a-de45-4cf9-8873-7754cda56b45,
  abstract     = {This paper presents a constructive algorithm for memory-aware task assignment and scheduling, which is a part of the prototype system MATAS. The algorithm is well suited for image and video processing applications which have hard memory constraints as well as constraints on cost, execution time, and resource usage. Our algorithm takes into account code and data memory constraints together with the other constraints. It can create pipelined implementations. The algorithm finds a task assignment, a schedule, and data and code memory placement in memory. Infeasible solutions caused by memory fragmentation are avoided. The experiments show that our memory-aware algorithm reduces memory utilization compared to greedy scheduling algorithm which has time minimization objective. Moreover, memory-aware algorithm is able to find task assignment and schedule when time minimization algorithm fails. MATAS can create pipelined implementations, therefore the design throughput is increased.},
  author       = {Szymanek, Radoslaw and Kuchcinski, Krzysztof},
  booktitle    = {Proceedings of the Ninth International Symposium on Hardware/Software Codesign},
  isbn         = {1-58113-364-2},
  language     = {eng},
  pages        = {147--152},
  title        = {A constructive algorithm for memory-aware task assignment and scheduling},
  url          = {http://dx.doi.org/10.1109/HSC.2001.924666},
  year         = {2001},
}