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A New Digital Front-End for Flexible Reception in Software Defined Radio

Diaz, Isael; Zhang, Chenxin; Hollevoet, Lieven; Svensson, Jim; Rodrigues, Joachim LU ; Wilhelmsson, Leif; Olsson, Thomas; Van der Perre, Liesbet and Öwall, Viktor LU (2015) In Microprocessors and Microsystems 39(8). p.889-900
Abstract
Future mobile terminals are expected to support an ever increasing number of Radio Access Technologies (RAT) concurrently. This imposes a challenge to terminal designers already today. Software Defined Radio (SDR) solutions are a compelling alternative to address this issue in the digital baseband, given its high flexibility and low Non-Recurring Engineering (NRE) cost. However, the challenge still remains in the Digital Front-End (DFE), where many operations are too complex or energy hungry to be implemented as software instructions. Thus, new architectures are needed to feed the SDR digital baseband while keeping complexity and energy consumption at bay. In this article the architecture of a Digital Front-End Receiver (DFE-Rx) for the... (More)
Future mobile terminals are expected to support an ever increasing number of Radio Access Technologies (RAT) concurrently. This imposes a challenge to terminal designers already today. Software Defined Radio (SDR) solutions are a compelling alternative to address this issue in the digital baseband, given its high flexibility and low Non-Recurring Engineering (NRE) cost. However, the challenge still remains in the Digital Front-End (DFE), where many operations are too complex or energy hungry to be implemented as software instructions. Thus, new architectures are needed to feed the SDR digital baseband while keeping complexity and energy consumption at bay. In this article the architecture of a Digital Front-End Receiver (DFE-Rx) for the next-generation mobile terminals is presented. The flexibility needed for multi-standard support is demonstrated by detecting, synchronizing and reporting carrier-frequency offset, of multiple concurrent radio standards. Moreover, the proposed architecture has been fabricated in a 65 nm CMOS low power high-VT cell technology in a die size of 5 mm2. The core module of the DFE-Rx, the synchronization engine, has been measured at 1.2 V and reports an average power consumption of 1.9 mW during Wireless Local Area Network (WLAN) reception and 1.6 mW during configuration, while running at 10 MHz. (Less)
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author
organization
publishing date
type
Contribution to journal
publication status
published
subject
in
Microprocessors and Microsystems
volume
39
issue
8
pages
889 - 900
publisher
Elsevier
external identifiers
  • wos:000366879500028
  • scopus:84927926705
ISSN
0141-9331
DOI
10.1016/j.micpro.2015.03.001
project
EIT_SOS VINNOVA Industrial Excellence Center - System Design on Silicon
language
English
LU publication?
yes
id
44a8f285-e2c2-442d-bb81-36cb7abe21bc (old id 5266659)
date added to LUP
2015-04-14 11:08:51
date last changed
2017-01-01 04:09:23
@article{44a8f285-e2c2-442d-bb81-36cb7abe21bc,
  abstract     = {Future mobile terminals are expected to support an ever increasing number of Radio Access Technologies (RAT) concurrently. This imposes a challenge to terminal designers already today. Software Defined Radio (SDR) solutions are a compelling alternative to address this issue in the digital baseband, given its high flexibility and low Non-Recurring Engineering (NRE) cost. However, the challenge still remains in the Digital Front-End (DFE), where many operations are too complex or energy hungry to be implemented as software instructions. Thus, new architectures are needed to feed the SDR digital baseband while keeping complexity and energy consumption at bay. In this article the architecture of a Digital Front-End Receiver (DFE-Rx) for the next-generation mobile terminals is presented. The flexibility needed for multi-standard support is demonstrated by detecting, synchronizing and reporting carrier-frequency offset, of multiple concurrent radio standards. Moreover, the proposed architecture has been fabricated in a 65 nm CMOS low power high-VT cell technology in a die size of 5 mm2. The core module of the DFE-Rx, the synchronization engine, has been measured at 1.2 V and reports an average power consumption of 1.9 mW during Wireless Local Area Network (WLAN) reception and 1.6 mW during configuration, while running at 10 MHz.},
  author       = {Diaz, Isael and Zhang, Chenxin and Hollevoet, Lieven and Svensson, Jim and Rodrigues, Joachim and Wilhelmsson, Leif and Olsson, Thomas and Van der Perre, Liesbet and Öwall, Viktor},
  issn         = {0141-9331},
  language     = {eng},
  number       = {8},
  pages        = {889--900},
  publisher    = {Elsevier},
  series       = {Microprocessors and Microsystems},
  title        = {A New Digital Front-End for Flexible Reception in Software Defined Radio},
  url          = {http://dx.doi.org/10.1016/j.micpro.2015.03.001},
  volume       = {39},
  year         = {2015},
}