FPGA Based Engine Feedback Control Algorithms
(2006)- Abstract
- High resolution real time heat release analysis will become increasingly important
in the future development of engine control systems. The increased demands on efficiency
and emissions will put high demands on future engine control. Future engine concepts, for example
the HCCI engine concept might crave cylinder pressure based Closed-Loop Combustion
Control (CLCC). The analysis of cylinder pressure is a relatively computationally expensive
task that is difficult to implement in existing engine controllers due to the real time demands.
This paper describes an approach to obtain such a high speed heat release analysis. The described
system could act as a platform for further... (More) - High resolution real time heat release analysis will become increasingly important
in the future development of engine control systems. The increased demands on efficiency
and emissions will put high demands on future engine control. Future engine concepts, for example
the HCCI engine concept might crave cylinder pressure based Closed-Loop Combustion
Control (CLCC). The analysis of cylinder pressure is a relatively computationally expensive
task that is difficult to implement in existing engine controllers due to the real time demands.
This paper describes an approach to obtain such a high speed heat release analysis. The described
system could act as a platform for further feedback control experiments. An experimental
setup is put together. The heat release algorithm is then developed using MATLAB and
SIMULINK. The emerging environment will serve as a prototyping system that can be used for
further development of advanced cylinder pressure based feedback control strategies. The performance
of the developed algorithm/system is examined in a simulated engine environment.
The heart of the system is a Field Programmable Gate Array (FPGA), an FPGA is best described
as an reconfigurable Application Specific Integrated Circuit (ASIC). The usage of an
FPGA gives the possibility of very high throughput and very low delay time and jitter of the
final system.
This system could of course also be developed using a normal Commersial Of The Shelf (COTS)
processor and a Real Time Operating System (RTOS). The high performance that would be
needed to calculate the heat release in the desired time in a multi cylinder engine would however
put high demands on the used processor; hence the price of the processor might make the
system too expensive, the FPGA describes an alternative approach. (Less)
Please use this url to cite or link to this publication:
https://lup.lub.lu.se/record/538193
- author
- Wilhelmsson, Carl LU ; Tunestål, Per LU and Johansson, Bengt LU
- organization
- publishing date
- 2006
- type
- Chapter in Book/Report/Conference proceeding
- publication status
- published
- subject
- keywords
- Heat release analysis, Engine control, ASIC, FPGA
- host publication
- FISITA 2006 World Automotive Congress
- publisher
- JSAE
- project
- Competence Centre for Combustion Processes
- language
- English
- LU publication?
- yes
- id
- 66ef75d7-77d0-40db-9b95-6d40256598e4 (old id 538193)
- date added to LUP
- 2016-04-04 12:17:41
- date last changed
- 2018-11-21 21:10:08
@inproceedings{66ef75d7-77d0-40db-9b95-6d40256598e4, abstract = {{High resolution real time heat release analysis will become increasingly important<br/><br> in the future development of engine control systems. The increased demands on efficiency<br/><br> and emissions will put high demands on future engine control. Future engine concepts, for example<br/><br> the HCCI engine concept might crave cylinder pressure based Closed-Loop Combustion<br/><br> Control (CLCC). The analysis of cylinder pressure is a relatively computationally expensive<br/><br> task that is difficult to implement in existing engine controllers due to the real time demands.<br/><br> This paper describes an approach to obtain such a high speed heat release analysis. The described<br/><br> system could act as a platform for further feedback control experiments. An experimental<br/><br> setup is put together. The heat release algorithm is then developed using MATLAB and<br/><br> SIMULINK. The emerging environment will serve as a prototyping system that can be used for<br/><br> further development of advanced cylinder pressure based feedback control strategies. The performance<br/><br> of the developed algorithm/system is examined in a simulated engine environment.<br/><br> The heart of the system is a Field Programmable Gate Array (FPGA), an FPGA is best described<br/><br> as an reconfigurable Application Specific Integrated Circuit (ASIC). The usage of an<br/><br> FPGA gives the possibility of very high throughput and very low delay time and jitter of the<br/><br> final system.<br/><br> This system could of course also be developed using a normal Commersial Of The Shelf (COTS)<br/><br> processor and a Real Time Operating System (RTOS). The high performance that would be<br/><br> needed to calculate the heat release in the desired time in a multi cylinder engine would however<br/><br> put high demands on the used processor; hence the price of the processor might make the<br/><br> system too expensive, the FPGA describes an alternative approach.}}, author = {{Wilhelmsson, Carl and Tunestål, Per and Johansson, Bengt}}, booktitle = {{FISITA 2006 World Automotive Congress}}, keywords = {{Heat release analysis; Engine control; ASIC; FPGA}}, language = {{eng}}, publisher = {{JSAE}}, title = {{FPGA Based Engine Feedback Control Algorithms}}, url = {{https://lup.lub.lu.se/search/files/5972330/625773.pdf}}, year = {{2006}}, }