A hybrid interconnect network-on-chip and a transaction level modeling approach for reconfigurable computing
(2008) IEEE International Symposium on Electronic Design, Test & Applications (DELTA) p.398-404- Abstract
- This paper presents a hybrid interconnect network consisting of a local network with dedicated wires and a global hierarchical network. A distributed memory approach enables the possibility to use generic memory banks as routing buffers, simplifies the implementation and reduces the area requirements of routers. A SystemC simulation environment (SCENIC) has been developed to simulate and instrument models, and to setup different topologies and scenarios. Modules are designed as transaction level models to improve design time and simulation speed.
Please use this url to cite or link to this publication:
https://lup.lub.lu.se/record/1160903
- author
- Lenart, Thomas LU ; Svensson, Henrik LU and Öwall, Viktor LU
- organization
- publishing date
- 2008
- type
- Chapter in Book/Report/Conference proceeding
- publication status
- published
- subject
- host publication
- [Host publication title missing]
- pages
- 398 - 404
- publisher
- IEEE - Institute of Electrical and Electronics Engineers Inc.
- conference name
- IEEE International Symposium on Electronic Design, Test & Applications (DELTA)
- conference dates
- 2008-01-23 - 2008-01-25
- external identifiers
-
- wos:000254291500082
- scopus:50649103294
- ISBN
- 978-0-7695-3110-6
- DOI
- 10.1109/DELTA.2008.85
- language
- English
- LU publication?
- yes
- id
- 556d90d1-8b26-46b4-8ff2-dda758d07f55 (old id 1160903)
- date added to LUP
- 2016-04-04 11:27:34
- date last changed
- 2022-01-29 21:53:18
@inproceedings{556d90d1-8b26-46b4-8ff2-dda758d07f55, abstract = {{This paper presents a hybrid interconnect network consisting of a local network with dedicated wires and a global hierarchical network. A distributed memory approach enables the possibility to use generic memory banks as routing buffers, simplifies the implementation and reduces the area requirements of routers. A SystemC simulation environment (SCENIC) has been developed to simulate and instrument models, and to setup different topologies and scenarios. Modules are designed as transaction level models to improve design time and simulation speed.}}, author = {{Lenart, Thomas and Svensson, Henrik and Öwall, Viktor}}, booktitle = {{[Host publication title missing]}}, isbn = {{978-0-7695-3110-6}}, language = {{eng}}, pages = {{398--404}}, publisher = {{IEEE - Institute of Electrical and Electronics Engineers Inc.}}, title = {{A hybrid interconnect network-on-chip and a transaction level modeling approach for reconfigurable computing}}, url = {{https://lup.lub.lu.se/search/files/5778443/1218536.pdf}}, doi = {{10.1109/DELTA.2008.85}}, year = {{2008}}, }