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A 70 pJ/b Configurable 64-QAM Soft MIMO Detector

Shabany, Mahdi ; Patel, Dimpesh ; Milicevic, Mario ; Mahdavi, Mojtaba LU orcid and Gulak, P. Glenn (2018) In Integration, the VLSI Journal 63. p.74-86
Abstract
An area and power efficient high-throughput VLSI implementation of a 4 × 4, 64-QAM soft multiple-input-multiple-output (MIMO) detector, that is suitable for high-order constellation schemes is presented. The proposed MIMO detector utilizes information contained in the discarded paths to improve the bit-error-rate (BER) performance, and then reduces computational complexity using three innovative improvement ideas. The proposed design is fabricated and fully tested in a 130 nm CMOS technology. Operating with a 270 MHz clock, the design achieves up to 655 Mbps throughput with 195 mW power dissipation at 1.32 V supply. Synthesis results in 65 nm CMOS technology shows that the proposed soft-output MIMO detector attains a peak coded data... (More)
An area and power efficient high-throughput VLSI implementation of a 4 × 4, 64-QAM soft multiple-input-multiple-output (MIMO) detector, that is suitable for high-order constellation schemes is presented. The proposed MIMO detector utilizes information contained in the discarded paths to improve the bit-error-rate (BER) performance, and then reduces computational complexity using three innovative improvement ideas. The proposed design is fabricated and fully tested in a 130 nm CMOS technology. Operating with a 270 MHz clock, the design achieves up to 655 Mbps throughput with 195 mW power dissipation at 1.32 V supply. Synthesis results in 65 nm CMOS technology shows that the proposed soft-output MIMO detector attains a peak coded data throughput of 2 Gbps. Furthermore, this detector is also suitable for low-power mobile applications that require high data rates, achieving a low decoding energy per bit of 70.3 pJ/bit at 1.1 V supply, while providing a data throughput of 640 Mbps in a 65 nm CMOS technology. The proposed design has the best throughput per unit area among all reported fabricated designs to-date (Less)
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author
; ; ; and
organization
publishing date
type
Contribution to journal
publication status
published
subject
keywords
Application-specific integrated circuit (ASIC) implementation, K-Best detectors, Multiple-input-multiple-output (MIMO) detection, Soft MIMO detectors
in
Integration, the VLSI Journal
volume
63
pages
13 pages
publisher
Elsevier
external identifiers
  • scopus:85047239788
ISSN
0167-9260
DOI
10.1016/j.vlsi.2018.05.008
language
English
LU publication?
yes
id
5bbb5658-392b-41cf-8041-8e6d35680ada
date added to LUP
2018-05-29 10:50:18
date last changed
2025-10-14 10:18:29
@article{5bbb5658-392b-41cf-8041-8e6d35680ada,
  abstract     = {{An area and power efficient high-throughput VLSI implementation of a 4 × 4, 64-QAM soft multiple-input-multiple-output (MIMO) detector, that is suitable for high-order constellation schemes is presented. The proposed MIMO detector utilizes information contained in the discarded paths to improve the bit-error-rate (BER) performance, and then reduces computational complexity using three innovative improvement ideas. The proposed design is fabricated and fully tested in a 130 nm CMOS technology. Operating with a 270 MHz clock, the design achieves up to 655 Mbps throughput with 195 mW power dissipation at 1.32 V supply. Synthesis results in 65 nm CMOS technology shows that the proposed soft-output MIMO detector attains a peak coded data throughput of 2 Gbps. Furthermore, this detector is also suitable for low-power mobile applications that require high data rates, achieving a low decoding energy per bit of 70.3 pJ/bit at 1.1 V supply, while providing a data throughput of 640 Mbps in a 65 nm CMOS technology. The proposed design has the best throughput per unit area among all reported fabricated designs to-date}},
  author       = {{Shabany, Mahdi and Patel, Dimpesh and Milicevic, Mario and Mahdavi, Mojtaba and Gulak, P. Glenn}},
  issn         = {{0167-9260}},
  keywords     = {{Application-specific integrated circuit (ASIC) implementation; K-Best detectors; Multiple-input-multiple-output (MIMO) detection; Soft MIMO detectors}},
  language     = {{eng}},
  month        = {{05}},
  pages        = {{74--86}},
  publisher    = {{Elsevier}},
  series       = {{Integration, the VLSI Journal}},
  title        = {{A 70 pJ/b Configurable 64-QAM Soft MIMO Detector}},
  url          = {{http://dx.doi.org/10.1016/j.vlsi.2018.05.008}},
  doi          = {{10.1016/j.vlsi.2018.05.008}},
  volume       = {{63}},
  year         = {{2018}},
}