On the packet-switched implementation of a discrete-time CNN
(2004) Proceedings of the Euromicro Symposium on Digital System Design (DSD) p.234-241- Abstract
- Cellular neural networks are widely used with real-time image processing's applications. Such systems can be efficiently realized using macro enriched field-programmable gate-arrays. This paper explores the benefits of packet switching and discusses its advantages over a current design based on circuit switching. The implementation is performed using Xilinx Virtex-II Pro P30 and handles around 500 Mpixels per second using 128 parallel processing nodes
Please use this url to cite or link to this publication:
https://lup.lub.lu.se/record/613541
- author
- Malki, Suleyman LU and Spaanenburg, Lambert LU
- organization
- publishing date
- 2004
- type
- Chapter in Book/Report/Conference proceeding
- publication status
- published
- subject
- keywords
- cellular neural networks, packet-switching, real-time image processing, circuit switching, field-programmable gate-arrays, Xilinx Virtex-II Pro P30, parallel processing nodes
- host publication
- Proceedings of the Euromicro Symposium on Digital System Design
- pages
- 234 - 241
- publisher
- IEEE - Institute of Electrical and Electronics Engineers Inc.
- conference name
- Proceedings of the Euromicro Symposium on Digital System Design (DSD)
- conference location
- Rennes, France
- conference dates
- 2004-08-31 - 2004-09-03
- external identifiers
-
- wos:000224458900031
- scopus:13944251376
- ISBN
- 0-7695-2203-3
- DOI
- 10.1109/DSD.2004.1333282
- language
- English
- LU publication?
- yes
- id
- eae35556-570b-4b40-a58d-d685b9c61791 (old id 613541)
- date added to LUP
- 2016-04-04 11:05:15
- date last changed
- 2022-01-29 21:20:10
@inproceedings{eae35556-570b-4b40-a58d-d685b9c61791, abstract = {{Cellular neural networks are widely used with real-time image processing's applications. Such systems can be efficiently realized using macro enriched field-programmable gate-arrays. This paper explores the benefits of packet switching and discusses its advantages over a current design based on circuit switching. The implementation is performed using Xilinx Virtex-II Pro P30 and handles around 500 Mpixels per second using 128 parallel processing nodes}}, author = {{Malki, Suleyman and Spaanenburg, Lambert}}, booktitle = {{Proceedings of the Euromicro Symposium on Digital System Design}}, isbn = {{0-7695-2203-3}}, keywords = {{cellular neural networks; packet-switching; real-time image processing; circuit switching; field-programmable gate-arrays; Xilinx Virtex-II Pro P30; parallel processing nodes}}, language = {{eng}}, pages = {{234--241}}, publisher = {{IEEE - Institute of Electrical and Electronics Engineers Inc.}}, title = {{On the packet-switched implementation of a discrete-time CNN}}, url = {{http://dx.doi.org/10.1109/DSD.2004.1333282}}, doi = {{10.1109/DSD.2004.1333282}}, year = {{2004}}, }