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Coarse grain clock gating of streaming applications in programmable logic implementations

Bezati, Endri; Casale Brunet, Simone; Mattavelli, Marco and Janneck, Jörn LU (2014) Electronic System Level Synthesis Conference (ESLsyn) In [Host publication title missing] p.1-6
Please use this url to cite or link to this publication:
author
organization
publishing date
type
Chapter in Book/Report/Conference proceeding
publication status
published
subject
in
[Host publication title missing]
pages
1 - 6
publisher
IEEE--Institute of Electrical and Electronics Engineers Inc.
conference name
Electronic System Level Synthesis Conference (ESLsyn)
external identifiers
  • scopus:84905379522
ISBN
979-10-92279-00-9
DOI
10.1109/ESLsyn.2014.6850387
language
English
LU publication?
yes
id
94cd457f-84dc-4038-95dd-54f63edc5add (old id 7991120)
date added to LUP
2015-09-25 09:36:18
date last changed
2017-04-16 04:31:30
@inproceedings{94cd457f-84dc-4038-95dd-54f63edc5add,
  author       = {Bezati, Endri and Casale Brunet, Simone and Mattavelli, Marco and Janneck, Jörn},
  booktitle    = {[Host publication title missing]},
  isbn         = {979-10-92279-00-9},
  language     = {eng},
  pages        = {1--6},
  publisher    = {IEEE--Institute of Electrical and Electronics Engineers Inc.},
  title        = {Coarse grain clock gating of streaming applications in programmable logic implementations},
  url          = {http://dx.doi.org/10.1109/ESLsyn.2014.6850387},
  year         = {2014},
}