Next Generation Digital Front-End for Multi-Standard Concurrent Reception
(2013) NORCHIP Conference, 2013- Abstract
- This article presents an architecture of a Digital Front-End Receiver (DFE-Rx) for the next-generation mobile terminals. A main focus is placed in flexibility, scalability and concurrency. The architecture is capable of detecting, synchronizing and reporting carrier-frequency offset, of multiple concurrent radio standards. The proposed receiver is fabricated in a 65nm CMOS low power high-VT cell technology in a die size of 5mm2. The synchronization engine has been measured at 1.2V and reports an average power consumption of 1.9mW during IEEE 802.11 reception and 1.6mW during configuration, while running at 10MHz.
Please use this url to cite or link to this publication:
https://lup.lub.lu.se/record/4092056
- author
- Diaz, Isael LU ; Zhang, Chenxin LU ; Hollevoet, Lieven ; Svensson, Jim ; Rodrigues, Joachim LU ; Wilhelmsson, Leif ; Olssson, Thomas ; Van der Perre, Liesbet and Öwall, Viktor LU
- organization
- publishing date
- 2013
- type
- Chapter in Book/Report/Conference proceeding
- publication status
- published
- subject
- keywords
- Multi-standard, DFE, concurrency, wireless, LTE, DVB-H, WLAN, connectivity, mobile-terminal.
- host publication
- [Host publication title missing]
- pages
- 6 pages
- publisher
- IEEE - Institute of Electrical and Electronics Engineers Inc.
- conference name
- NORCHIP Conference, 2013
- conference location
- Vilnius, Lithuania
- conference dates
- 2013-11-11 - 2013-11-12
- external identifiers
-
- scopus:84893615177
- DOI
- 10.1109/NORCHIP.2013.6702041
- language
- English
- LU publication?
- yes
- id
- 7f521d7e-2c52-4853-8630-fa3622b5261c (old id 4092056)
- date added to LUP
- 2016-04-04 10:11:36
- date last changed
- 2022-05-17 02:29:17
@inproceedings{7f521d7e-2c52-4853-8630-fa3622b5261c, abstract = {{This article presents an architecture of a Digital Front-End Receiver (DFE-Rx) for the next-generation mobile terminals. A main focus is placed in flexibility, scalability and concurrency. The architecture is capable of detecting, synchronizing and reporting carrier-frequency offset, of multiple concurrent radio standards. The proposed receiver is fabricated in a 65nm CMOS low power high-VT cell technology in a die size of 5mm2. The synchronization engine has been measured at 1.2V and reports an average power consumption of 1.9mW during IEEE 802.11 reception and 1.6mW during configuration, while running at 10MHz.}}, author = {{Diaz, Isael and Zhang, Chenxin and Hollevoet, Lieven and Svensson, Jim and Rodrigues, Joachim and Wilhelmsson, Leif and Olssson, Thomas and Van der Perre, Liesbet and Öwall, Viktor}}, booktitle = {{[Host publication title missing]}}, keywords = {{Multi-standard; DFE; concurrency; wireless; LTE; DVB-H; WLAN; connectivity; mobile-terminal.}}, language = {{eng}}, publisher = {{IEEE - Institute of Electrical and Electronics Engineers Inc.}}, title = {{Next Generation Digital Front-End for Multi-Standard Concurrent Reception}}, url = {{http://dx.doi.org/10.1109/NORCHIP.2013.6702041}}, doi = {{10.1109/NORCHIP.2013.6702041}}, year = {{2013}}, }