A two-stage mm-wave PA with 18.5% PAE in 65 nm CMOS
(2015) 2015 Asia-Pacific Microwave Conference (APMC) 1. p.1-3- Abstract
- A two-stage mm-wave power amplifier (PA) is presented. Designed in a 65 nm CMOS process, the PA employs capacitive neutralization in each stage for increased differential isolation and gain. Baluns are used for single-ended input/output signal to balanced signal conversion, and the interstage matching consists of a 2:1 transformer. With a 1.2 V supply, at 67 GHz, measurements show a gain of 16.8 dB, a 1dB-compression point (P1dB) of 8.4 dBm and a saturated output power (Psat) of 11.8dBm, with a peak power added efficiency (PAE) of 18.5 %. The PA core occupies an area of 100 um x 300 um.
Please use this url to cite or link to this publication:
https://lup.lub.lu.se/record/8834717
- author
- Forsberg, Therese LU ; Sjöland, Henrik LU and Törmänen, Markus LU
- organization
- publishing date
- 2015
- type
- Chapter in Book/Report/Conference proceeding
- publication status
- published
- subject
- host publication
- 2015 Asia-Pacific Microwave Conference (APMC)
- volume
- 1
- pages
- 3 pages
- conference name
- 2015 Asia-Pacific Microwave Conference (APMC)
- conference location
- Nanjing, China
- conference dates
- 2015-12-06 - 2015-12-09
- external identifiers
-
- scopus:84978152204
- ISBN
- 978-1-4799-8765-8
- DOI
- 10.1109/APMC.2015.7411664
- language
- English
- LU publication?
- yes
- id
- c4355bf7-c2a6-49a4-b558-19d2037ba443 (old id 8834717)
- date added to LUP
- 2016-04-04 13:27:52
- date last changed
- 2024-01-13 07:33:33
@inproceedings{c4355bf7-c2a6-49a4-b558-19d2037ba443, abstract = {{A two-stage mm-wave power amplifier (PA) is presented. Designed in a 65 nm CMOS process, the PA employs capacitive neutralization in each stage for increased differential isolation and gain. Baluns are used for single-ended input/output signal to balanced signal conversion, and the interstage matching consists of a 2:1 transformer. With a 1.2 V supply, at 67 GHz, measurements show a gain of 16.8 dB, a 1dB-compression point (P1dB) of 8.4 dBm and a saturated output power (Psat) of 11.8dBm, with a peak power added efficiency (PAE) of 18.5 %. The PA core occupies an area of 100 um x 300 um.}}, author = {{Forsberg, Therese and Sjöland, Henrik and Törmänen, Markus}}, booktitle = {{2015 Asia-Pacific Microwave Conference (APMC)}}, isbn = {{978-1-4799-8765-8}}, language = {{eng}}, pages = {{1--3}}, title = {{A two-stage mm-wave PA with 18.5% PAE in 65 nm CMOS}}, url = {{http://dx.doi.org/10.1109/APMC.2015.7411664}}, doi = {{10.1109/APMC.2015.7411664}}, volume = {{1}}, year = {{2015}}, }