Code Generation for a SIMD Architecture with Custom Memory Organisation
Arslan, Mehmet Ali LU ; Gruian, Flavius LU
; Kuchcinski, Krzysztof
LU
and Karlsson, Andreas
(2017)
Conference on Design & Architectures for Signal & Image Processing (DASIP 2016)
p.90-97
- Abstract
- Today’s multimedia and DSP applications impose requirements on performance and power consumption that only custom processor architectures with SIMD capabilities can satisfy. However, the specific features of such architectures, including vector operations and high-bandwidth complex memory organization, make them notoriously complicated and time consuming to program. In this paper we present an automated code generation approach that dramatically reduces the effort of programming such architectures, by carrying out instruction scheduling and memory allocation based on a constraint programming formulation. Furthermore, the quality of the generated code is close to that of hand-written code by an experienced programmer with knowledge of the... (More)
- Today’s multimedia and DSP applications impose requirements on performance and power consumption that only custom processor architectures with SIMD capabilities can satisfy. However, the specific features of such architectures, including vector operations and high-bandwidth complex memory organization, make them notoriously complicated and time consuming to program. In this paper we present an automated code generation approach that dramatically reduces the effort of programming such architectures, by carrying out instruction scheduling and memory allocation based on a constraint programming formulation. Furthermore, the quality of the generated code is close to that of hand-written code by an experienced programmer with knowledge of the architecture. We demonstrate the viability of our approach on an existing custom heterogeneous DSP architecture, by compiling and running a number of typical DSP kernels, and comparing the results to hand-optimized code. (Less)
Please use this url to cite or link to this publication:
https://lup.lub.lu.se/record/8b568263-f9f0-4cdf-ba2c-3bd144a7693e
- author
- Arslan, Mehmet Ali
LU
; Gruian, Flavius
LU
; Kuchcinski, Krzysztof
LU
and Karlsson, Andreas
- organization
- publishing date
- 2017
- type
- Chapter in Book/Report/Conference proceeding
- publication status
- published
- subject
- host publication
- 2016 Conference on Design and Architectures for Signal and Image Processing (DASIP)
- pages
- 90 - 97
- publisher
- IEEE - Institute of Electrical and Electronics Engineers Inc.
- conference name
- Conference on Design & Architectures for Signal & Image Processing (DASIP 2016)
- conference location
- Rennes, France
- conference dates
- 2016-10-12 - 2016-10-14
- external identifiers
-
- scopus:85014453016
- ISBN
- 979-1-0922-7915-3
- DOI
- 10.1109/DASIP.2016.7853802
- language
- English
- LU publication?
- yes
- id
- 8b568263-f9f0-4cdf-ba2c-3bd144a7693e
- date added to LUP
- 2016-08-22 13:50:27
- date last changed
- 2022-01-30 05:36:12
@inproceedings{8b568263-f9f0-4cdf-ba2c-3bd144a7693e,
abstract = {{Today’s multimedia and DSP applications impose requirements on performance and power consumption that only custom processor architectures with SIMD capabilities can satisfy. However, the specific features of such architectures, including vector operations and high-bandwidth complex memory organization, make them notoriously complicated and time consuming to program. In this paper we present an automated code generation approach that dramatically reduces the effort of programming such architectures, by carrying out instruction scheduling and memory allocation based on a constraint programming formulation. Furthermore, the quality of the generated code is close to that of hand-written code by an experienced programmer with knowledge of the architecture. We demonstrate the viability of our approach on an existing custom heterogeneous DSP architecture, by compiling and running a number of typical DSP kernels, and comparing the results to hand-optimized code.}},
author = {{Arslan, Mehmet Ali and Gruian, Flavius and Kuchcinski, Krzysztof and Karlsson, Andreas}},
booktitle = {{2016 Conference on Design and Architectures for Signal and Image Processing (DASIP)}},
isbn = {{979-1-0922-7915-3}},
language = {{eng}},
pages = {{90--97}},
publisher = {{IEEE - Institute of Electrical and Electronics Engineers Inc.}},
title = {{Code Generation for a SIMD Architecture with Custom Memory Organisation}},
url = {{http://dx.doi.org/10.1109/DASIP.2016.7853802}},
doi = {{10.1109/DASIP.2016.7853802}},
year = {{2017}},
}