Data assignment and access scheduling exploration for multi-layer memory architectures
Szymanek, Radoslaw LU ; Catthoor, Francky and Kuchcinski, Krzysztof LU
(2004)
Proceedings of the 2004 2nd Workshop on Embedded Systems for Real-Time Multimedia
p.61-66
- Abstract
- This paper presents an exploration framework which performs data assignment and access scheduling exploration for applications given a multilayer memory architecture. Our framework uses multiobjective criteria during exploration, such as application execution time, energy, bandwidth, and data size. In order to tackle the complexity of the exploration, it is divided into three phases; Pareto diagram composition, data assignment, and access scheduling. The first phase produces multidimensional Pareto points for our application. After this phase, our framework produces distinct data assignments which are represented as Pareto points in a two dimensional space defined by bandwidth requirements and size requirements. Finally, the scheduling... (More)
- This paper presents an exploration framework which performs data assignment and access scheduling exploration for applications given a multilayer memory architecture. Our framework uses multiobjective criteria during exploration, such as application execution time, energy, bandwidth, and data size. In order to tackle the complexity of the exploration, it is divided into three phases; Pareto diagram composition, data assignment, and access scheduling. The first phase produces multidimensional Pareto points for our application. After this phase, our framework produces distinct data assignments which are represented as Pareto points in a two dimensional space defined by bandwidth requirements and size requirements. Finally, the scheduling phase finds possibly optimal order of the tasks and performs precise scheduling of the tasks. Three feedbacks paths are present which can be used to iteratively improve exploration results. It is possible to trade off the quality of the results and the algorithm runtime. We have evaluated our framework on a medical image processing application. We have shown that our algorithms can perform exploration of the huge design space in an iterative manner and obtains good Pareto diagram coverage. (Less)
Please use this url to cite or link to this publication:
https://lup.lub.lu.se/record/614622
- author
- Szymanek, Radoslaw
LU
; Catthoor, Francky
and Kuchcinski, Krzysztof
LU
- organization
- publishing date
- 2004
- type
- Chapter in Book/Report/Conference proceeding
- publication status
- published
- subject
- keywords
- Data access ordering, Data ssignment, Multi-layer memory architectures, Pareto-optimal diagram
- host publication
- Proceedings of the 2004 2nd Workshop on Embedded Systems for Real-Time Multimedia
- pages
- 61 - 66
- publisher
- IEEE - Institute of Electrical and Electronics Engineers Inc.
- conference name
- Proceedings of the 2004 2nd Workshop on Embedded Systems for Real-Time Multimedia
- conference location
- Stockholm, Sweden
- conference dates
- 2004-09-06 - 2004-09-07
- external identifiers
-
- wos:000224458600011
- scopus:14244261625
- ISBN
- 0780386310
- language
- English
- LU publication?
- yes
- id
- 8e7a90ca-db3a-4c6e-ace1-c74bddc189fa (old id 614622)
- date added to LUP
- 2016-04-04 11:29:13
- date last changed
- 2022-01-29 21:58:37
@inproceedings{8e7a90ca-db3a-4c6e-ace1-c74bddc189fa,
abstract = {{This paper presents an exploration framework which performs data assignment and access scheduling exploration for applications given a multilayer memory architecture. Our framework uses multiobjective criteria during exploration, such as application execution time, energy, bandwidth, and data size. In order to tackle the complexity of the exploration, it is divided into three phases; Pareto diagram composition, data assignment, and access scheduling. The first phase produces multidimensional Pareto points for our application. After this phase, our framework produces distinct data assignments which are represented as Pareto points in a two dimensional space defined by bandwidth requirements and size requirements. Finally, the scheduling phase finds possibly optimal order of the tasks and performs precise scheduling of the tasks. Three feedbacks paths are present which can be used to iteratively improve exploration results. It is possible to trade off the quality of the results and the algorithm runtime. We have evaluated our framework on a medical image processing application. We have shown that our algorithms can perform exploration of the huge design space in an iterative manner and obtains good Pareto diagram coverage.}},
author = {{Szymanek, Radoslaw and Catthoor, Francky and Kuchcinski, Krzysztof}},
booktitle = {{Proceedings of the 2004 2nd Workshop on Embedded Systems for Real-Time Multimedia}},
isbn = {{0780386310}},
keywords = {{Data access ordering; Data ssignment; Multi-layer memory architectures; Pareto-optimal diagram}},
language = {{eng}},
pages = {{61--66}},
publisher = {{IEEE - Institute of Electrical and Electronics Engineers Inc.}},
title = {{Data assignment and access scheduling exploration for multi-layer memory architectures}},
year = {{2004}},
}