A 4.3-mW mm-Wave Divide-by-Two Circuit with 30% Locking Range in 28-nm FD-SOI CMOS
Forsberg, Therese LU ; Wernehag, Johan LU ; Sjöland, Henrik LU
and Törmänen, Markus
LU
(2018)
2018 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC)
- Abstract
- A mm-wave divide-by-two circuit with high injection efficiency, implemented in a 28-nm fully-depleted silicon-on-insulator (FD-SOI) CMOS process is demonstrated stand-alone, as well as using an on-chip voltage controlled oscillator (VCO) as the input signal source. Measurements show that the divider has a 30.1 % tuning range centered at an output frequency of 24 GHz, at an input signal power of -1.5 dBm, and a power consumption of 4.3 mW from a 0.9 V supply. The VCO and divider combination has a tuning range of 10.2 %, centered at an output frequency of 30.2 GHz, at a total power consumption of 6.3 mW, and an output phase noise of -111 dBc/Hz at 10 MHz offset. The active area of the divider is 0.032 mm 2 and of the divider and VCO... (More)
- A mm-wave divide-by-two circuit with high injection efficiency, implemented in a 28-nm fully-depleted silicon-on-insulator (FD-SOI) CMOS process is demonstrated stand-alone, as well as using an on-chip voltage controlled oscillator (VCO) as the input signal source. Measurements show that the divider has a 30.1 % tuning range centered at an output frequency of 24 GHz, at an input signal power of -1.5 dBm, and a power consumption of 4.3 mW from a 0.9 V supply. The VCO and divider combination has a tuning range of 10.2 %, centered at an output frequency of 30.2 GHz, at a total power consumption of 6.3 mW, and an output phase noise of -111 dBc/Hz at 10 MHz offset. The active area of the divider is 0.032 mm 2 and of the divider and VCO combination 0.043 mm 2 . (Less)
- Abstract (Swedish)
- A mm-wave divide-by-two circuit with high injection efficiency, implemented in a 28-nm fully-depleted silicon-on-insulator (FD-SOI) CMOS process is demonstrated stand-alone, as well as using an on-chip voltage controlled oscillator (VCO) as the input signal source. Measurements show that the divider has a 30.1 % tuning range centered at an output frequency of 24 GHz, at an input signal power of -1.5 dBm, and a power consumption of 4.3 mW from a 0.9 V supply. The VCO and divider combination has a tuning range of 10.2 %, centered at an output frequency of 30.2 GHz, at a total power consumption of 6.3 mW, and an output phase noise of -111 dBc/Hz at 10 MHz offset. The active area of the divider is 0.032 mm 2 and of the divider and VCO... (More)
- A mm-wave divide-by-two circuit with high injection efficiency, implemented in a 28-nm fully-depleted silicon-on-insulator (FD-SOI) CMOS process is demonstrated stand-alone, as well as using an on-chip voltage controlled oscillator (VCO) as the input signal source. Measurements show that the divider has a 30.1 % tuning range centered at an output frequency of 24 GHz, at an input signal power of -1.5 dBm, and a power consumption of 4.3 mW from a 0.9 V supply. The VCO and divider combination has a tuning range of 10.2 %, centered at an output frequency of 30.2 GHz, at a total power consumption of 6.3 mW, and an output phase noise of -111 dBc/Hz at 10 MHz offset. The active area of the divider is 0.032 mm 2 and of the divider and VCO combination 0.043 mm 2. (Less)
Please use this url to cite or link to this publication:
https://lup.lub.lu.se/record/b3a0e6c0-faf6-4560-bb82-8664482c8efb
- author
- Forsberg, Therese
LU
; Wernehag, Johan
LU
; Sjöland, Henrik
LU
and Törmänen, Markus
LU
- organization
- publishing date
- 2018-10-30
- type
- Chapter in Book/Report/Conference proceeding
- publication status
- published
- subject
- host publication
- 2018 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC)
- pages
- 4 pages
- publisher
- IEEE - Institute of Electrical and Electronics Engineers Inc.
- conference name
- 2018 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC)
- conference location
- Tallin, Estonia
- conference dates
- 2018-10-30 - 2018-10-31
- external identifiers
-
- scopus:85060596647
- ISBN
- 978-1-5386-7656-1
- 978-1-5386-7657-8
- DOI
- 10.1109/NORCHIP.2018.8573468
- language
- English
- LU publication?
- yes
- id
- b3a0e6c0-faf6-4560-bb82-8664482c8efb
- date added to LUP
- 2019-01-08 09:44:08
- date last changed
- 2024-04-17 02:49:20
@inproceedings{b3a0e6c0-faf6-4560-bb82-8664482c8efb,
abstract = {{A mm-wave divide-by-two circuit with high injection efficiency, implemented in a 28-nm fully-depleted silicon-on-insulator (FD-SOI) CMOS process is demonstrated stand-alone, as well as using an on-chip voltage controlled oscillator (VCO) as the input signal source. Measurements show that the divider has a 30.1 % tuning range centered at an output frequency of 24 GHz, at an input signal power of -1.5 dBm, and a power consumption of 4.3 mW from a 0.9 V supply. The VCO and divider combination has a tuning range of 10.2 %, centered at an output frequency of 30.2 GHz, at a total power consumption of 6.3 mW, and an output phase noise of -111 dBc/Hz at 10 MHz offset. The active area of the divider is 0.032 mm 2 and of the divider and VCO combination 0.043 mm 2 .}},
author = {{Forsberg, Therese and Wernehag, Johan and Sjöland, Henrik and Törmänen, Markus}},
booktitle = {{2018 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC)}},
isbn = {{978-1-5386-7656-1}},
language = {{eng}},
month = {{10}},
publisher = {{IEEE - Institute of Electrical and Electronics Engineers Inc.}},
title = {{A 4.3-mW mm-Wave Divide-by-Two Circuit with 30% Locking Range in 28-nm FD-SOI CMOS}},
url = {{http://dx.doi.org/10.1109/NORCHIP.2018.8573468}},
doi = {{10.1109/NORCHIP.2018.8573468}},
year = {{2018}},
}