A Noise Cancelling 0.7-3.8 GHz Resistive Feedback Receiver Front-End in 65 nm CMOS
(2014) IEEE Radio Frequency Integrated Circuits 2014 p.35-38- Abstract
- This paper presents a noise cancelling 0.7–
3.8GHz receiver front-end implemented in 65nm technology.
The circuit has a main path consisting of a high input
impedance gm-stage, current-mode passive mixers and baseband
amplifiers, where the input match is provided by frequency
translational negative feedback from baseband to RF
input. An auxiliary path with tunable gain is introduced to
cancel noise from the main path while maintaining linearity.
The receiver front-end achieves a noise figure of 1.6–3.7dB
and an IIP2 and IIP3 of >75dBm and >1dBm, respectively.
The current consumption of the circuit is 22.8–34.9mA, from
a 1.2V supply.
Please use this url to cite or link to this publication:
https://lup.lub.lu.se/record/4378097
- author
- Nejdel, Anders LU ; Törmänen, Markus LU and Sjöland, Henrik LU
- organization
- publishing date
- 2014
- type
- Chapter in Book/Report/Conference proceeding
- publication status
- published
- subject
- keywords
- Analog integrated circuits, CMOS integrated circuits, Current mode circuits, Low-noise amplifiers, Mixers, Radiofrequency integrated circuits.
- host publication
- [Host publication title missing]
- pages
- 35 - 38
- publisher
- IEEE - Institute of Electrical and Electronics Engineers Inc.
- conference name
- IEEE Radio Frequency Integrated Circuits 2014
- conference location
- Tampa, United States
- conference dates
- 2014-06-01
- external identifiers
-
- wos:000361191700006
- scopus:84904968355
- ISSN
- 1529-2517
- DOI
- 10.1109/RFIC.2014.6851651
- project
- EIT_DARE Digitally-Assisted Radio Evolution
- language
- English
- LU publication?
- yes
- id
- bb1861b1-9a82-41df-8792-1e420422b98a (old id 4378097)
- date added to LUP
- 2016-04-01 14:34:03
- date last changed
- 2024-01-10 05:37:30
@inproceedings{bb1861b1-9a82-41df-8792-1e420422b98a, abstract = {{This paper presents a noise cancelling 0.7–<br/><br> 3.8GHz receiver front-end implemented in 65nm technology.<br/><br> The circuit has a main path consisting of a high input<br/><br> impedance gm-stage, current-mode passive mixers and baseband<br/><br> amplifiers, where the input match is provided by frequency<br/><br> translational negative feedback from baseband to RF<br/><br> input. An auxiliary path with tunable gain is introduced to<br/><br> cancel noise from the main path while maintaining linearity.<br/><br> The receiver front-end achieves a noise figure of 1.6–3.7dB<br/><br> and an IIP2 and IIP3 of >75dBm and >1dBm, respectively.<br/><br> The current consumption of the circuit is 22.8–34.9mA, from<br/><br> a 1.2V supply.}}, author = {{Nejdel, Anders and Törmänen, Markus and Sjöland, Henrik}}, booktitle = {{[Host publication title missing]}}, issn = {{1529-2517}}, keywords = {{Analog integrated circuits; CMOS integrated circuits; Current mode circuits; Low-noise amplifiers; Mixers; Radiofrequency integrated circuits.}}, language = {{eng}}, pages = {{35--38}}, publisher = {{IEEE - Institute of Electrical and Electronics Engineers Inc.}}, title = {{A Noise Cancelling 0.7-3.8 GHz Resistive Feedback Receiver Front-End in 65 nm CMOS}}, url = {{http://dx.doi.org/10.1109/RFIC.2014.6851651}}, doi = {{10.1109/RFIC.2014.6851651}}, year = {{2014}}, }