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A Modified Complex K-best Scheme for High-speed Hard-output MIMO Detectors

Mahdavi, Mojtaba LU ; Shabany, Mahdi and Vosoughi Vahdat, Bijan (2010) 53rd IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), 2010 In 53rd IEEE International Midwest Symposium on Circuits and Systems (MWSCAS) p.845-848
Abstract
The current literature lacks the VLSI realization of high-order multiple-input-multiple-output (MIMO) detectors in the complex domain, which finds applications in advanced wireless standards such as WiMAX and Long Term Evolution (LTE) systems. In this paper, a novel modified complex K-Best algorithm and its VLSI implementation for a 4൴, 64QAM complex MIMO detector are proposed. The main contributions of this paper are the modified hard-output complex K-Best algorithm as well as its efficient architecture, which is well-suited for a pipelined VLSI implementation. By using an efficient fast multiplier and applying both fine-grain pipelining and coarse-grain pipelining to the architecture of the MIMO detector, an improved critical path is... (More)
The current literature lacks the VLSI realization of high-order multiple-input-multiple-output (MIMO) detectors in the complex domain, which finds applications in advanced wireless standards such as WiMAX and Long Term Evolution (LTE) systems. In this paper, a novel modified complex K-Best algorithm and its VLSI implementation for a 4൴, 64QAM complex MIMO detector are proposed. The main contributions of this paper are the modified hard-output complex K-Best algorithm as well as its efficient architecture, which is well-suited for a pipelined VLSI implementation. By using an efficient fast multiplier and applying both fine-grain pipelining and coarse-grain pipelining to the architecture of the MIMO detector, an improved critical path is obtained, which results in a higher throughput. Complexity analysis and the synthesis results in a 0.18µ CMOS technology show that compared to the reported VLSI implementations in both the real domain and complex domain, the proposed architecture achieves the highest reported throughput. The proposed architecture is fully in parallel with a fixed critical path independent of the constellation order, which can result in a throughput up to 1Gbps. (Less)
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author
organization
publishing date
type
Chapter in Book/Report/Conference proceeding
publication status
published
subject
in
53rd IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)
pages
4 pages
publisher
IEEE--Institute of Electrical and Electronics Engineers Inc.
conference name
53rd IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), 2010
external identifiers
  • scopus:77956601912
ISBN
978-1-4244-7771-5
978-1-4244-7773-9
DOI
10.1109/MWSCAS.2010.5548676
language
English
LU publication?
no
id
c30b2147-8abd-43e9-97a3-29d364636ed5
date added to LUP
2016-12-24 16:12:51
date last changed
2018-05-29 11:06:50
@inproceedings{c30b2147-8abd-43e9-97a3-29d364636ed5,
  abstract     = {The current literature lacks the VLSI realization of high-order multiple-input-multiple-output (MIMO) detectors in the complex domain, which finds applications in advanced wireless standards such as WiMAX and Long Term Evolution (LTE) systems. In this paper, a novel modified complex K-Best algorithm and its VLSI implementation for a 4൴, 64QAM complex MIMO detector are proposed. The main contributions of this paper are the modified hard-output complex K-Best algorithm as well as its efficient architecture, which is well-suited for a pipelined VLSI implementation. By using an efficient fast multiplier and applying both fine-grain pipelining and coarse-grain pipelining to the architecture of the MIMO detector, an improved critical path is obtained, which results in a higher throughput. Complexity analysis and the synthesis results in a 0.18µ CMOS technology show that compared to the reported VLSI implementations in both the real domain and complex domain, the proposed architecture achieves the highest reported throughput. The proposed architecture is fully in parallel with a fixed critical path independent of the constellation order, which can result in a throughput up to 1Gbps.},
  author       = {Mahdavi, Mojtaba and Shabany, Mahdi and Vosoughi Vahdat, Bijan },
  booktitle    = {53rd IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)},
  isbn         = { 978-1-4244-7771-5},
  language     = {eng},
  month        = {08},
  pages        = {845--848},
  publisher    = {IEEE--Institute of Electrical and Electronics Engineers Inc.},
  title        = {A Modified Complex K-best Scheme for High-speed Hard-output MIMO Detectors},
  url          = {http://dx.doi.org/10.1109/MWSCAS.2010.5548676},
  year         = {2010},
}