TamaRISC-CS: An Ultra-Low-Power Application-Specific Processor for Compressed Sensing
(2012) IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SOC) p.159-164- Abstract
- Compressed sensing (CS) is a universal technique for the compression of sparse signals. CS has been widely used in sensing platforms where portable, autonomous devices have to operate for long periods of time with limited energy resources. Therefore, an ultra-low-power (ULP) CS implementation is vital for these kind of energy-limited systems. Sub-threshold (sub-VT) operation is commonly used for ULP computing, and can also be combined with CS. However, most established CS implementations can achieve either no or very limited benefit from sub-VT operation. Therefore, we propose a sub-VT application-specific instruction-set processor (ASIP), exploiting the specific operations of CS. Our results show that the proposed ASIP accomplishes 62x... (More)
- Compressed sensing (CS) is a universal technique for the compression of sparse signals. CS has been widely used in sensing platforms where portable, autonomous devices have to operate for long periods of time with limited energy resources. Therefore, an ultra-low-power (ULP) CS implementation is vital for these kind of energy-limited systems. Sub-threshold (sub-VT) operation is commonly used for ULP computing, and can also be combined with CS. However, most established CS implementations can achieve either no or very limited benefit from sub-VT operation. Therefore, we propose a sub-VT application-specific instruction-set processor (ASIP), exploiting the specific operations of CS. Our results show that the proposed ASIP accomplishes 62x speed-up and 11.6x power savings with respect to an established CS implementation running on the baseline low-power processor. (Less)
Please use this url to cite or link to this publication:
https://lup.lub.lu.se/record/2968408
- author
- Constantin, Jeremy ; Dogan, Ahmed ; Andersson, Oskar LU ; Meinerzhagen, Pascal ; Rodrigues, Joachim LU ; Atienza, David and Burg, Andreas
- organization
- publishing date
- 2012
- type
- Chapter in Book/Report/Conference proceeding
- publication status
- published
- subject
- host publication
- IEEE/IFIP 20th International Conference on VLSI and System-on-Chip (VLSI-SoC), 2012
- pages
- 159 - 164
- publisher
- IEEE - Institute of Electrical and Electronics Engineers Inc.
- conference name
- IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SOC)
- conference location
- Santa Cruz, United States
- conference dates
- 2012-10-07
- external identifiers
-
- scopus:84872183309
- ISBN
- 978-1-4673-2657-5
- DOI
- 10.1109/VLSI-SoC.2012.6379023
- language
- English
- LU publication?
- yes
- id
- c4f2cb6a-dea3-4cce-becd-7c9c260ecbcf (old id 2968408)
- date added to LUP
- 2016-04-04 12:24:29
- date last changed
- 2022-04-24 02:06:25
@inproceedings{c4f2cb6a-dea3-4cce-becd-7c9c260ecbcf, abstract = {{Compressed sensing (CS) is a universal technique for the compression of sparse signals. CS has been widely used in sensing platforms where portable, autonomous devices have to operate for long periods of time with limited energy resources. Therefore, an ultra-low-power (ULP) CS implementation is vital for these kind of energy-limited systems. Sub-threshold (sub-VT) operation is commonly used for ULP computing, and can also be combined with CS. However, most established CS implementations can achieve either no or very limited benefit from sub-VT operation. Therefore, we propose a sub-VT application-specific instruction-set processor (ASIP), exploiting the specific operations of CS. Our results show that the proposed ASIP accomplishes 62x speed-up and 11.6x power savings with respect to an established CS implementation running on the baseline low-power processor.}}, author = {{Constantin, Jeremy and Dogan, Ahmed and Andersson, Oskar and Meinerzhagen, Pascal and Rodrigues, Joachim and Atienza, David and Burg, Andreas}}, booktitle = {{IEEE/IFIP 20th International Conference on VLSI and System-on-Chip (VLSI-SoC), 2012}}, isbn = {{978-1-4673-2657-5}}, language = {{eng}}, pages = {{159--164}}, publisher = {{IEEE - Institute of Electrical and Electronics Engineers Inc.}}, title = {{TamaRISC-CS: An Ultra-Low-Power Application-Specific Processor for Compressed Sensing}}, url = {{http://dx.doi.org/10.1109/VLSI-SoC.2012.6379023}}, doi = {{10.1109/VLSI-SoC.2012.6379023}}, year = {{2012}}, }