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Hardware Implementation of an Iterative Sampling Rate Converter for Wireless Communication

Stala, Michal ; Bilgin, Can ; Gangarajaiah, Rakesh and Rodrigues, Joachim LU (2010) IEEE Global Telecommunications Conference GLOBECOM 2010
Abstract (Swedish)
Abstract in Undetermined

This paper presents a new technique for fractional sample rate conversion based on an iterative Sinc (ISRC) method. The proposed algorithm was evaluated against the Farrow re-sampler, and performance simulation targeting different signal-to-noise ratios show the ISRC qualifies for application in reconfigurable terminals. The architecture was implemented in 65nm CMOS technology, and synthesis results show that the ISRC requires at least 23% less silicon area, compared to a Farrow filter with similar performance. The generic nature of the architecture enables further area reduction by time-multiplexing.
Please use this url to cite or link to this publication:
author
; ; and
organization
publishing date
type
Chapter in Book/Report/Conference proceeding
publication status
published
subject
keywords
Farrow, re-sampling, LTE
host publication
IEEE Global Telecommunications Conference (Globecom)
publisher
IEEE - Institute of Electrical and Electronics Engineers Inc.
conference name
IEEE Global Telecommunications Conference GLOBECOM 2010
conference location
Miami, FL, United States
conference dates
2010-12-06 - 2010-12-10
external identifiers
  • wos:000287977401020
  • scopus:79551633962
ISSN
1930-529X
ISBN
978-1-4244-5638-3
language
English
LU publication?
yes
id
d2cfc34f-824c-42c6-8786-332a0de88917 (old id 1624831)
date added to LUP
2016-04-01 15:04:26
date last changed
2022-01-28 03:59:39
@inproceedings{d2cfc34f-824c-42c6-8786-332a0de88917,
  abstract     = {{<b>Abstract in Undetermined</b><br/><br>
This paper presents a new technique for fractional sample rate conversion based on an iterative Sinc (ISRC) method. The proposed algorithm was evaluated against the Farrow re-sampler, and performance simulation targeting different signal-to-noise ratios show the ISRC qualifies for application in reconfigurable terminals. The architecture was implemented in 65nm CMOS technology, and synthesis results show that the ISRC requires at least 23% less silicon area, compared to a Farrow filter with similar performance. The generic nature of the architecture enables further area reduction by time-multiplexing.}},
  author       = {{Stala, Michal and Bilgin, Can and Gangarajaiah, Rakesh and Rodrigues, Joachim}},
  booktitle    = {{IEEE Global Telecommunications Conference (Globecom)}},
  isbn         = {{978-1-4244-5638-3}},
  issn         = {{1930-529X}},
  keywords     = {{Farrow; re-sampling; LTE}},
  language     = {{eng}},
  publisher    = {{IEEE - Institute of Electrical and Electronics Engineers Inc.}},
  title        = {{Hardware Implementation of an Iterative Sampling Rate Converter for Wireless Communication}},
  year         = {{2010}},
}