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Protocol Requirements in an SJTAG/IJTAG Environment

Carlsson, Gunnar ; Holmqvist, Johan and Larsson, Erik LU orcid (2007) International Test Conference, 2007 p.1-3
Abstract
Integrated Circuits, Printed Circuits Boards, and Multi-board systems are becoming increasingly complex to test. A major obstacle is test access, which would be eased by effective standards for the communication between devices-under-test (DUTs) and the test manager. Currently, the Internal Joint Test Access Group (IJTAG) work at micro-level on a standard for interfacing embedded on-chip instruments while the System JTAG (SJTAG) work at macro-level on a standard for system-level test management that connects IJTAG compatible instruments with the system test manager. In this paper we discuss requirements on a test protocol to be used in an SJTAG/IJTAG environment. We have from a number of use scenarios made an analysis and defined protocol... (More)
Integrated Circuits, Printed Circuits Boards, and Multi-board systems are becoming increasingly complex to test. A major obstacle is test access, which would be eased by effective standards for the communication between devices-under-test (DUTs) and the test manager. Currently, the Internal Joint Test Access Group (IJTAG) work at micro-level on a standard for interfacing embedded on-chip instruments while the System JTAG (SJTAG) work at macro-level on a standard for system-level test management that connects IJTAG compatible instruments with the system test manager. In this paper we discuss requirements on a test protocol to be used in an SJTAG/IJTAG environment. We have from a number of use scenarios made an analysis and defined protocol requirements. We have taken the Standard Test and Programming Language (STAPL), which is built around a player (interpreter), and defined required extensions. The extensions have been implemented in an extended version of STAPL and we have made experiments with a PC acting as test controller and an FPGA being the DUT. (Less)
Please use this url to cite or link to this publication:
author
; and
organization
publishing date
type
Chapter in Book/Report/Conference proceeding
publication status
published
subject
keywords
testing, Integrated Circuits, Printed Circuits Boards, Multi-board systems, test protocol
host publication
[Host publication title missing]
pages
1 - 3
publisher
IEEE - Institute of Electrical and Electronics Engineers Inc.
conference name
International Test Conference, 2007
conference location
Santa Clara, CA, United States
conference dates
2007-10-21 - 2007-10-26
external identifiers
  • scopus:39749100675
ISSN
1089-3539
ISBN
978-1-4244-1127-6
DOI
10.1109/TEST.2007.4437658
language
English
LU publication?
no
id
fec0070a-a9a9-4fbf-8079-de9a229d0bd6 (old id 2341016)
date added to LUP
2016-04-01 17:02:44
date last changed
2022-01-28 23:55:41
@inproceedings{fec0070a-a9a9-4fbf-8079-de9a229d0bd6,
  abstract     = {{Integrated Circuits, Printed Circuits Boards, and Multi-board systems are becoming increasingly complex to test. A major obstacle is test access, which would be eased by effective standards for the communication between devices-under-test (DUTs) and the test manager. Currently, the Internal Joint Test Access Group (IJTAG) work at micro-level on a standard for interfacing embedded on-chip instruments while the System JTAG (SJTAG) work at macro-level on a standard for system-level test management that connects IJTAG compatible instruments with the system test manager. In this paper we discuss requirements on a test protocol to be used in an SJTAG/IJTAG environment. We have from a number of use scenarios made an analysis and defined protocol requirements. We have taken the Standard Test and Programming Language (STAPL), which is built around a player (interpreter), and defined required extensions. The extensions have been implemented in an extended version of STAPL and we have made experiments with a PC acting as test controller and an FPGA being the DUT.}},
  author       = {{Carlsson, Gunnar and Holmqvist, Johan and Larsson, Erik}},
  booktitle    = {{[Host publication title missing]}},
  isbn         = {{978-1-4244-1127-6}},
  issn         = {{1089-3539}},
  keywords     = {{testing; Integrated Circuits; Printed Circuits Boards; Multi-board systems; test protocol}},
  language     = {{eng}},
  pages        = {{1--3}},
  publisher    = {{IEEE - Institute of Electrical and Electronics Engineers Inc.}},
  title        = {{Protocol Requirements in an SJTAG/IJTAG Environment}},
  url          = {{http://dx.doi.org/10.1109/TEST.2007.4437658}},
  doi          = {{10.1109/TEST.2007.4437658}},
  year         = {{2007}},
}