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2011
Mark A 5GHz 90-nm CMOS all digital phase-locked loop
Lu, Ping ^LU and Sjöland, Henrik ^LU (2011) In Analog Integrated Circuits and Signal Processing 66(1). p.49-59
- Contribution to journal › Article
2009
Mark A 5GHz 90-nm CMOS all digital phase-locked loop
Lu, Ping ^LU and Sjöland, Henrik ^LU (2009) IEEE Asian Solid-State Circuits Conference (ASSCC), 2009 p.65-68
- Contribution to conference › Paper, not in proceeding

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