Implementing In-Memory Computation Architectures for Digital Pre-Distortion Using Ferroelectric Tunnel Junction Memristors

Abstract

Today, digital pre-distortion (DPD) is the predominant technique for linearising the power amplifiers (PAs) used in telecommunication radio transmitters. However, conventional DPD implementations rely on power-hungry digital signal processing, making energy efficiency a critical concern. Compute in-memory (CiM) architectures have previously been demonstrated to provide significant efficiency gains when applied to data-intensive workloads involving simple calculations, such as neural network inference. Since part of the DPD process involves similarly simple computations performed on large volumes of data, this thesis investigates whether DPD can be efficiently implemented using CiM architectures. Specifically, crossbar arrays made up of ferroelectric tunnel junction (FTJ) memristors are evaluated as a possible CiM technology for this purpose, owing to the FTJ’s non-linear I-V characteristics and low power consumption.
Two simulation tools were employed. IBM’s AIHWKit was used for accuracy simulations, and CiMLoop for power, performance, and area (PPA) analysis. Three DPD models of varying sizes were defined and evaluated across a range of hardware configurations, including different levels of programming noise, analogue-to-digital converter (ADC) resolutions, and operand bit precisions.
The accuracy simulations yielded promising results. Multiple hardware configurations achieved adjacent channel power ratios (ACPRs) below −45dB, a maximum threshold based on 3GPP conformance specifications. The PPA results were less conclusive. Energy and area estimates could not easily be compared to real world hardware due to the limited scope of the simulation-based analysis. More critically, the per-sample latency was estimated at 2.95µs, corresponding to a sampling frequency of about 0.34MHz. Resulting from the long noise integration times of the low current FTJ devices, this throughput bottleneck makes the implementation fall far short of the GHz-range sampling rates required for real-time 5G DPD.
In short, this thesis demonstrates that FTJ-based CiM architectures can achieve the accuracy required to perform DPD calculations, but struggle to reach the throughput demands of a real-time 5G system. Addressing this speed limitation, possibly by increasing FTJ device conductance, remains the primary challenge for future development of FTJ-based CiM DPD.

Popular Abstract

Mobile phones, and the networks used to communicate between them, are indispensable technologies in today’s connected society. For the cell tower and phone to reach each other they require radio power amplifiers to amplify the strength of the radio signals that carry information back and forth between them. Unfortunately, efficient power amplifiers inevitably distort the signals they amplify, something that today is compensated for using massive, power hungry digital calculations. What if these calculations could instead be performed by energy efficient programmable resistors, that use quantum mechanical tunnelling for multiplication and addition?
In our project we investigate whether these programmable resistors, known as memristors, can be used to efficiently implement digital pre-distortion calculations. Digital pre-distortion is the most common method for counteracting the distortions introduced by power amplifiers in use today. The idea behind it is to apply the inverse of the distortions to the signal before feeding it to the amplifier, thereby making the resulting signal leaving the amplifier undistorted. For this we use a relatively new type of memristor, called a ferroelectric tunnel junction memristor, in which the resistance is set by the adjustable quantum tunnelling of electrons.
Digital pre-distortion calculations are complicated and they have to be done to every single bit of signal passing through the amplifier. This makes the digital pre-distorter a large and power hungry part of the radio transmitter. We show that we can instead perform these calculations directly using memristors, where multiplications are calculated using Ohm’s law, which states that the current is equal to the resistance multiplied by the voltage. The memristors can then be organised into an array, where the parameters used for the calculations are stored as the resistances of the memristors. This method of computation is called computing in-memory and is an active field of research, mainly with the goal of making large AI models more energy efficient.
In our implementation we define three working digital pre-distortion models of different sizes. In simulation software made for simulating compute in-memory hardware we then apply the models to a 5G signal before feeding it to a model amplifier. We perform this simulation while varying the levels of electronic noise and other potential sources of error and find that the models can sufficiently pre distort the signal according to requirements in the 5G standard.
We also use simulation tools to evaluate and compare the energy consumption, circuit area, and speed of the calculations based on different design choices of our compute in-memory array. Here we find that in its current form, our implementation does not have the sufficient calculation speed to perform the pre-distortion in real time. This is mainly due to the low current of the experimental memristors, which limits how quickly the result of a calculation can be read.

• author: Lundstedt, Hugo and Håkansson Struglics, Erik
• supervisor: Mattias Borg; Saeed Bastani; Ashkan Kalantari
• organization: Department of Electrical and Information Technology
• course: EITM01 20261
• year: 2026
• type: H2 - Master's Degree (Two Years)
• subject: Technology and Engineering
• keywords: Compute In-Memory, CiM, Analogue In-Memory Computing, AIMC, Processing In-Memory, PiM, Ferroelectric Tunnel Junction Memristors, FTJ Memristors, Memristor, Digital Pre-Distortion, DPD, Memory Polynomial, MP, Generalised Memory Polynomial, GMP, Vector Switching, CiMLoop, IBM AIHWKIT
• report number: LU/LTH-EIT 2026-1155
• language: English
• id: 9236166
• date added to LUP: 2026-06-17 10:07:59
• date last changed: 2026-06-17 10:07:59