Department of Electrical and Information Technology
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- 2024
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Mark
A 2x Time-Interleaved 24-GS/s 12-Bit Resistive DAC
- Master (Two yrs)
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Mark
Evaluation of LLMs for Hardware Test Generation
- Master (Two yrs)
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Mark
Enhancing Software Security with AI: Detecting Vulnerabilities in High-Level Programming Languages
- Master (Two yrs)
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Mark
Setting up WebAssembly in a Cloud Environment that Supports AMD Secure Encrypted Virtualization
- Master (Two yrs)
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Mark
PIM Characterization of 3D-printed RF Components
- Master (Two yrs)
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Mark
Integrated Error Detection at Software Launches with the Use of Machine Learning
- Master (Two yrs)
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Mark
Comparator Design for High Speed ADC
- Master (Two yrs)
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Mark
Resource Sharing between SoCs through a Dedicated SerDes-channel
- Master (Two yrs)
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Mark
Optimization of antenna array layouts in planar and non-planar geometries for DoA estimation
- Master (Two yrs)
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Mark
ASIC implementation exploration for EfficientNet optimizations
- Master (Two yrs)