Department of Electrical and Information Technology
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- 2016
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Mark
Modeling and Implementation of A 6-Bit, 50MHz Pipelined ADC in CMOS
- Master (Two yrs)
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Mark
The Design and Linearization of 60GHz Injection Locked Power Amplifier
- Master (Two yrs)
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Mark
Studies of vacuum discharges in the CLIC accelerating structure
- Master (Two yrs)
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Mark
Design and Implementation of a 2-Channel High Precision and High Speed Digitizing system
- Master (Two yrs)
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Mark
Adaptive Beamforming for Next Generation Cellular System
- Master (Two yrs)
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Mark
Compact Object Security for the Internet of Things
- Master (Two yrs)
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Mark
Performance Evaluation of GPRS and Fiber as Transmission Medium for Social Care Systems
- Master (Two yrs)
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Mark
Design, Build and Test of planar antennae
- Master (Two yrs)
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Mark
Solving NTRU Challenges Using the New Progressive BKZ Library
- Master (Two yrs)
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Mark
Time Synchronization in Short Range Wireless Networks
- Master (Two yrs)