Evaluation of Discrete-Time Wideband Receivers for NB-IoT
(2021) EITM02 20182Department of Electrical and Information Technology
- Abstract
- A receiver that covers several RF bands requires multiple front-end filters which increases the cost in terms of components and/or board/silicon area. Front-end filters assist a receiver to withstand interference at multiples of its down-conversion frequency. Analog discrete-time filters have gained a lot of traction lately, mainly due to their promising architecture, achieving baseband filtering, image and harmonic rejection within the same circuit, allowing a fully integration on-chip. These filters will also scale well with further process shrinking as only switches, capacitors and transconductors are required. The evaluation is performed with a standard 40 nm CMOS technology. This thesis aims to focus on those details that previous... (More)
- A receiver that covers several RF bands requires multiple front-end filters which increases the cost in terms of components and/or board/silicon area. Front-end filters assist a receiver to withstand interference at multiples of its down-conversion frequency. Analog discrete-time filters have gained a lot of traction lately, mainly due to their promising architecture, achieving baseband filtering, image and harmonic rejection within the same circuit, allowing a fully integration on-chip. These filters will also scale well with further process shrinking as only switches, capacitors and transconductors are required. The evaluation is performed with a standard 40 nm CMOS technology. This thesis aims to focus on those details that previous papers did not describe in detail, such as different topologies of switches and transconductors, mismatches, non-ideal clock sources, capacitive ratios, intermediate frequency, sample rate, common-mode, noise, on-resistance of switches, power consumption, folding, and simulation aspects with Spectre. To understand these filters a dedicated theory chapter is included, starting from a simple first-order low-pass filter up to the complex M/2M band-pass filter which uses M signals and 2M clock phases. All of the above is applied onto a Narrowband Internet of Things (NB-IoT) receiver, as specified in 3GPP release 15. However, a final receiver is not built, only a theoretical one on paper. Discrete-time filters are not suitable for NB-IoT, primarily due to the low requirement on bandwidth (180KHz), pointing towards a low baseband frequency, which is the opposite of what these filters are suitable for. A high sample rate is required to not degrade the systems performance from folding issues, causing high power consumption. The theoretical receiver is derived to handle all test cases and RF bands, as specified from 3GPP release 15. However, it was not possible to implement a receiver without any front-end filter due to the lack of attenuation of harmonic content over all RF bands. To reduce the power consumption a second-order anti-alias filter was required to reduce the sample rate. The Power consumption was 6.65 mW with a supply voltage of 1.2 V , excluding LNA, mixer, clock dividers and ADC. (Less)
- Popular Abstract
- In today’s world almost everything is connected by a wireless connection. Given the past history even more will be connected, even for things that no one asked for, perhaps even a can opener. All devices should also be battery powered with several years between any charging. Which can be summarized with other words; how can we create a wireless device that’s both cheap and barely consumes any energy? Both of these parts are solved by further integration onto silicon, which is the building foundation of an integrated circuit, namely ’chips’ or transistors. You find these transistors in everything from your smart LED lamp to your mobile phone. The cost aspects can be explained through ’economy of scale’, which simplifies to "producing two of... (More)
- In today’s world almost everything is connected by a wireless connection. Given the past history even more will be connected, even for things that no one asked for, perhaps even a can opener. All devices should also be battery powered with several years between any charging. Which can be summarized with other words; how can we create a wireless device that’s both cheap and barely consumes any energy? Both of these parts are solved by further integration onto silicon, which is the building foundation of an integrated circuit, namely ’chips’ or transistors. You find these transistors in everything from your smart LED lamp to your mobile phone. The cost aspects can be explained through ’economy of scale’, which simplifies to "producing two of the same will always be cheaper than two different things". A real-world example of this would be the dual zone fridge freezer, one could argue that the freezer is integrated into the fridge and thereby making it cheaper to buy then buying the two by themselves. I think we all have heard about submicroscopic transistors, which year after year shrink in size, mainly due to the science and engineering efforts into this field. As an example, the physical diameter of the COVID-19 virus is ∼100 nm [1] which in comparison to today’s transistors is colossal. This thesis is built upon a rather old manufacturing process of 40 nm, in which its mass production started back in 2008. Today you can buy phones in masses that are built upon 5 nm transistors. In any case, this might sound rather good, which it is! At least for computers and phones as smaller devices means less energy for the same performance, which also goes the other way around. Given the same speed, one can reduce the energy consumption, effectively increase the battery time. But for analog circuits, such as amplifiers, there is not much to gain. There are even aspects where it’s worse. Analog discrete-time circuits are supposedly a solution to this, as it scales with the same parameters as computers, but also opens the possibility of more integration onto silicon due to their nature in design, and thereby reducing its cost. (Less)
Please use this url to cite or link to this publication:
http://lup.lub.lu.se/student-papers/record/9068108
- author
- Wasting, Magnus LU
- supervisor
- organization
- course
- EITM02 20182
- year
- 2021
- type
- H2 - Master's Degree (Two Years)
- subject
- keywords
- Discrete, time, filter, NB-IoT, Charge, Sharing, CMOS
- report number
- LU/LTH-EIT 2021-852
- language
- English
- id
- 9068108
- date added to LUP
- 2021-11-16 09:40:17
- date last changed
- 2021-11-16 09:40:17
@misc{9068108,
abstract = {{A receiver that covers several RF bands requires multiple front-end filters which increases the cost in terms of components and/or board/silicon area. Front-end filters assist a receiver to withstand interference at multiples of its down-conversion frequency. Analog discrete-time filters have gained a lot of traction lately, mainly due to their promising architecture, achieving baseband filtering, image and harmonic rejection within the same circuit, allowing a fully integration on-chip. These filters will also scale well with further process shrinking as only switches, capacitors and transconductors are required. The evaluation is performed with a standard 40 nm CMOS technology. This thesis aims to focus on those details that previous papers did not describe in detail, such as different topologies of switches and transconductors, mismatches, non-ideal clock sources, capacitive ratios, intermediate frequency, sample rate, common-mode, noise, on-resistance of switches, power consumption, folding, and simulation aspects with Spectre. To understand these filters a dedicated theory chapter is included, starting from a simple first-order low-pass filter up to the complex M/2M band-pass filter which uses M signals and 2M clock phases. All of the above is applied onto a Narrowband Internet of Things (NB-IoT) receiver, as specified in 3GPP release 15. However, a final receiver is not built, only a theoretical one on paper. Discrete-time filters are not suitable for NB-IoT, primarily due to the low requirement on bandwidth (180KHz), pointing towards a low baseband frequency, which is the opposite of what these filters are suitable for. A high sample rate is required to not degrade the systems performance from folding issues, causing high power consumption. The theoretical receiver is derived to handle all test cases and RF bands, as specified from 3GPP release 15. However, it was not possible to implement a receiver without any front-end filter due to the lack of attenuation of harmonic content over all RF bands. To reduce the power consumption a second-order anti-alias filter was required to reduce the sample rate. The Power consumption was 6.65 mW with a supply voltage of 1.2 V , excluding LNA, mixer, clock dividers and ADC.}},
author = {{Wasting, Magnus}},
language = {{eng}},
note = {{Student Paper}},
title = {{Evaluation of Discrete-Time Wideband Receivers for NB-IoT}},
year = {{2021}},
}