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- 2023
-
Mark
A Digital Phase-Locked Loop for Frequency Synthesis using an Adaptive Pulse Shrinking TDC
(
- Master (Two yrs)
- 2021
-
Mark
Evaluation of Discrete-Time Wideband Receivers for NB-IoT
(
- Master (Two yrs)
-
Mark
Investigating power amplifier behavior in User Equipment terminals
(
- Master (Two yrs)
- 2020
-
Mark
Ring amplifiers for high speed pipeline assisted SAR ADCs
(
- Master (Two yrs)
-
Mark
Bi-directional Low Pass Filter and Mixer Design
(
- Master (Two yrs)
- 2019
-
Mark
Methodology For Improving performance & Reliability In Low Voltage on-chip Memories
(
- Master (Two yrs)
- 2018
-
Mark
Digitally Controlled Oscillator for mm-Wave Frequencies
(
- Master (Two yrs)
-
Mark
Phase Locked Loops in Fully Integrated NB-IoT Transceivers
(
- Master (Two yrs)
-
Mark
Integrated antenna switch for NB-IoT
(
- Master (Two yrs)
-
Mark
Ethernet Bypass Switch
2018) In Master Thesis Written Report EITM02 20181(
Department of Electrical and Information Technology- Master (Two yrs)