A Digital Design Flow - From Concept to RTL Description, Using Mathworks and Cadence's Tools

Abstract

This report presents our digital design flow for creating high speed very large scale integration circuits using a fifth generation disruptive beamforming control and data processing circuit as example. The flow consists of different stages. First, a design stage where a golden reference is created in Mathworks' Simulink using different HDL supported toolboxes like the DSP HDL toolbox. Testbenches are created along side the golden reference in Mathworks' environment with Matlab and Simulink. The same testbenches will be used during the entirety of the flow to continuously verify all of the components in each stage. The second stage is the code generation which will be done using another toolbox from Mathworks, the HDL Coder. To verify the code, Cadence's Xcelium will be used together with Mathworks' HDL Verification toolbox to simulate the produced code using the mentioned testbenches, giving the simulation the same stimuli as used for the golden reference. To automate the flow, automation scripts are created to configure, set up and start the different steps of the stages and connecting the Cadence tools to the Mathworks environment, leaving only the system designing left for the developer. As a final step, Cadence's Genus is used to synthesize the system and evaluate the designs cost in terms of area and speed with the use of a 65 nm standard cell library.

The HDL Coder generates HDL in a hierarchical, readable and well documented fashion with extended debugging properties. The many settings allow for customization of the generation, both in terms of coding style and in architecture. The quality in terms of design costs lies upon the developer. Even though the many toolboxes with predefined algorithms exists to help the designer, custom control systems do not exist as toolboxes and are not better than its implementation as designed by the creator. Using the Mathworks and Xcelium tools in the same environment allowed to reduce the verification time by reuse of testbenches and automate the design of components for a chip concept like the 5G disruptive digital beamforming circuit for BeammWave.

Popular Abstract

The upcoming 5G-New Radio Standard will enable cellular communication in the millimeter-Wave (mmWave) frequency bands, mainly at 24-30GHz. The mmWave frequency bands open up for large system bandwidth and Gb/s data rates enabling a lot of new use cases, such as advanced Augmented Reality (AR) and Virtual Reality (VR) applications. However, the high isotropic path loss between the radio transmitter and radio receiver for mmWave makes it necessary to rely on antenna arrays with large number of antenna elements. These antenna arrays overcome the path loss by high directional gain through beamforming which focus energy in a particular direction in order to mitigate the high path loss in the mmWave frequency band.

The first 5G mmWave mobile devices on the market, such as smartphones, will use analog beamforming. The main reason is time to market. Analog beamforming solution is bulky and far from optimized with respect to cost, size and power consumption, and hence the first mmWave devices on the market merely constitute a proof-of-concept solution for cellular communication using mmWave.

For smartphones and IoT devices targeting the mass market, the radio architecture really needs to be optimized from cost and size perspective. The start-up company BeammWave has developed a disruptive digital beamforming architecture, by integrating the RF IC, front end Radio modules, filters, and antenna element in a single RF chip that will drastically change the way beamforming will be implemented in mobile devices in the future. Future mobile devices will rely on digital beamforming.

With increased system complexity, methods and tools that can shorten the design development time become increasingly important, specially concerning digital designs. Traditionally, a system description is typically “manually” translated to VHDL or Verilog and then introduced into a digital flow. Recently, tools have appeared that can automatically convert Matlab/Simulink system descriptions using e.g., the HDL Coder toolbox in Matlab, to generate HDL that can be introduced into the digital flow in Cadence's tools. With more complex systems the capability of these tools needs to be evaluated.

In this Master's Thesis, we present our flow, how to connect and use the different state of the art tools. We will also show how to automate the processes by using real digital designs needed by BeammWave in their disruptive digital beamforming, as examples. This flow includes everything from the design process to creating idealized models. From generating HDL and verifying its behavior, to synthesizing which estimates the cost, size and timing. Finally the flow is evaluated, not only in the resulting quality compared to a traditional flow, but also from the developing perspective, comparing traditional and our flow in terms of automation and hours spent for development.

• author: Hammarbäck, Tor and Deza Concori, Jorge
• supervisor: Steffen Malkowsky; Per-Olof Brandt; Joakim Axmon
• organization: Department of Electrical and Information Technology
• alternative title: Digitalt design flöde - Från koncept till RTL-beskrivning med hjälp av Mathworks och Cadences verktyg.
• course: EITM01 20221
• year: 2022
• type: H2 - Master's Degree (Two Years)
• subject: Technology and Engineering
• report number: LU/LTH-EIT 2022-891
• language: English
• id: 9101845
• alternative location: https://github.com/THammarback/MasterThesis
• date added to LUP: 2022-10-31 13:43:39
• date last changed: 2022-10-31 13:43:39