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- 2016
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Mark
Highly linear attenuator and mixer for wide band TOR in CMOS
- Master (Two yrs)
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Mark
Memory Energy Optimizations for IoT Processors
- Master (Two yrs)
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Mark
Practical Aspects of Reduced Complexity LDPC Decoding using Forced Convergence
- Master (Two yrs)
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Mark
Performance Evaluation of Distributed Antenna Systems: Comparison using the COST 2100 Model and Measured Channels
- Master (Two yrs)
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Mark
A Study of Lattice Reduction Detection Techniques for LTE Systems
- Master (Two yrs)
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Mark
Design of a 30 GHz PLL for use in Phased Arrays
- Master (Two yrs)
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Mark
Frequency Offset Estimation for Multiuser Systems Based on a Low Dimensional Approximation of the Likelihood Function
- Master (Two yrs)
- 2015
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Mark
Complexity Reduction in the CORDIC Algorithm by using MUXes
- Master (Two yrs)
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Mark
Low-power Microprocessor based on Stack-Architecture
- Master (Two yrs)
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Mark
Hardware Implementation of a 32-point Radix-2 FFT Architecture
- Master (Two yrs)