Memory architecture evaluation for video encoding on enhanced embedded processors
Iranpour, Ali LU and Kuchcinski, Krzysztof LU
(2006)
Embedded Computer Systems: Architectures, Modeling, and Simulation. 6th International Workshop
4017.
p.309-320
- Abstract
- In this paper we investigate the impact of different memory configurations on performance and energy consumption of the video encoding applications, MPEG-4 and H.264. The memory architecture is integrated with SIMD extended embedded processor, proposed in our previous work. We explore both dedicated memories and multilevel cache-architectures and perform exhaustive simulations. The simulations have been conducted using highly optimized proprietary video encoding code for mobile handheld devices. Our simulation results show that the performance improvement of dedicated memories on video encoding applications is not very significant. The multilevel cache-based architecture processes approximately 17 frames/s compared to 1922 frames/s for 512... (More)
- In this paper we investigate the impact of different memory configurations on performance and energy consumption of the video encoding applications, MPEG-4 and H.264. The memory architecture is integrated with SIMD extended embedded processor, proposed in our previous work. We explore both dedicated memories and multilevel cache-architectures and perform exhaustive simulations. The simulations have been conducted using highly optimized proprietary video encoding code for mobile handheld devices. Our simulation results show that the performance improvement of dedicated memories on video encoding applications is not very significant. The multilevel cache-based architecture processes approximately 17 frames/s compared to 1922 frames/s for 512 KB dedicated on-chip zero-wait state memory. Thus it is difficult to justify using dedicated memory for this kind of embedded systems, when energy consumption and cost of implementation are also considered. (Less)
Please use this url to cite or link to this publication:
https://lup.lub.lu.se/record/397479
- author
- Iranpour, Ali
LU
and Kuchcinski, Krzysztof
LU
- organization
- publishing date
- 2006
- type
- Chapter in Book/Report/Conference proceeding
- publication status
- published
- subject
- host publication
- Embedded Computer Systems: Architectures, Modeling, and Simulation. Proceedings (Lecture Notes in Computer Science)
- volume
- 4017
- pages
- 309 - 320
- publisher
- Springer
- conference name
- Embedded Computer Systems: Architectures, Modeling, and Simulation. 6th International Workshop
- conference location
- Samos, Greece
- conference dates
- 2006-07-17 - 2006-07-20
- external identifiers
-
- wos:000239423500032
- scopus:33746668079
- ISSN
- 1611-3349
- 0302-9743
- ISBN
- 978-3-540-36410-8
- DOI
- 10.1007/11796435_32
- language
- English
- LU publication?
- yes
- id
- b1ef4629-75f2-42fe-98a2-a2059e126b75 (old id 397479)
- date added to LUP
- 2016-04-01 12:05:56
- date last changed
- 2024-01-08 08:17:52
@inproceedings{b1ef4629-75f2-42fe-98a2-a2059e126b75,
abstract = {{In this paper we investigate the impact of different memory configurations on performance and energy consumption of the video encoding applications, MPEG-4 and H.264. The memory architecture is integrated with SIMD extended embedded processor, proposed in our previous work. We explore both dedicated memories and multilevel cache-architectures and perform exhaustive simulations. The simulations have been conducted using highly optimized proprietary video encoding code for mobile handheld devices. Our simulation results show that the performance improvement of dedicated memories on video encoding applications is not very significant. The multilevel cache-based architecture processes approximately 17 frames/s compared to 1922 frames/s for 512 KB dedicated on-chip zero-wait state memory. Thus it is difficult to justify using dedicated memory for this kind of embedded systems, when energy consumption and cost of implementation are also considered.}},
author = {{Iranpour, Ali and Kuchcinski, Krzysztof}},
booktitle = {{Embedded Computer Systems: Architectures, Modeling, and Simulation. Proceedings (Lecture Notes in Computer Science)}},
isbn = {{978-3-540-36410-8}},
issn = {{1611-3349}},
language = {{eng}},
pages = {{309--320}},
publisher = {{Springer}},
title = {{Memory architecture evaluation for video encoding on enhanced embedded processors}},
url = {{http://dx.doi.org/10.1007/11796435_32}},
doi = {{10.1007/11796435_32}},
volume = {{4017}},
year = {{2006}},
}