Architectures for Dynamic Data Scaling in 2/4/8K Pipeline FFT Cores
(2006) In IEEE Transactions on Very Large Scale Integration (VLSI) Systems 14(11). p.1286-1290- Abstract
- This paper presents architectures for supporting dynamic
data scaling in pipeline fast Fourier transforms (FFTs), suitable when implementing large size FFTs in applications such as digital video broadcasting and digital holographic imaging. In a pipeline FFT, data is continuously streaming and must, hence, be scaled without stalling the dataflow. We propose a hybrid floating-point scheme with tailored exponent datapath, and a co-optimized architecture between hybrid floating point and block floating point (BFP) to reduce memory requirements for 2-D signal processing. The presented co-optimization generates a higher signal-to-quantization-noise ratio and requires less memory than for
instance convergent BFP. A 2048-point... (More) - This paper presents architectures for supporting dynamic
data scaling in pipeline fast Fourier transforms (FFTs), suitable when implementing large size FFTs in applications such as digital video broadcasting and digital holographic imaging. In a pipeline FFT, data is continuously streaming and must, hence, be scaled without stalling the dataflow. We propose a hybrid floating-point scheme with tailored exponent datapath, and a co-optimized architecture between hybrid floating point and block floating point (BFP) to reduce memory requirements for 2-D signal processing. The presented co-optimization generates a higher signal-to-quantization-noise ratio and requires less memory than for
instance convergent BFP. A 2048-point pipeline FFT has been fabricated in a standard-CMOS process from AMI Semiconductor (Lenart and Öwall, 2003), and a field-programmable gate array prototype integrating a 2-D FFT core in a larger design shows that the architecture is suitable for image reconstruction in digital holographic imaging. (Less)
Please use this url to cite or link to this publication:
https://lup.lub.lu.se/record/602701
- author
- Lenart, Thomas LU and Öwall, Viktor LU
- organization
- publishing date
- 2006
- type
- Contribution to journal
- publication status
- published
- subject
- keywords
- multiplexing (OFDM), orthogonal frequency-division, transform (FFT), hybrid floating point, fast Fourier, dynamic data scaling, digital video broadcasting (DVB), digital holography, block floating point (BFP), convergent BFP (CBFP)
- in
- IEEE Transactions on Very Large Scale Integration (VLSI) Systems
- volume
- 14
- issue
- 11
- pages
- 1286 - 1290
- publisher
- IEEE - Institute of Electrical and Electronics Engineers Inc.
- external identifiers
-
- wos:000242554900012
- scopus:33845544964
- ISSN
- 1063-8210
- DOI
- 10.1109/TVLSI.2006.886407
- language
- English
- LU publication?
- yes
- id
- d49eeb46-839a-41fa-b815-d93705edfd3d (old id 602701)
- alternative location
- http://ieeexplore.ieee.org/iel5/92/4019453/04019462.pdf
- date added to LUP
- 2016-04-01 15:40:23
- date last changed
- 2022-03-07 00:46:37
@article{d49eeb46-839a-41fa-b815-d93705edfd3d, abstract = {{This paper presents architectures for supporting dynamic<br/><br> data scaling in pipeline fast Fourier transforms (FFTs), suitable when implementing large size FFTs in applications such as digital video broadcasting and digital holographic imaging. In a pipeline FFT, data is continuously streaming and must, hence, be scaled without stalling the dataflow. We propose a hybrid floating-point scheme with tailored exponent datapath, and a co-optimized architecture between hybrid floating point and block floating point (BFP) to reduce memory requirements for 2-D signal processing. The presented co-optimization generates a higher signal-to-quantization-noise ratio and requires less memory than for<br/><br> instance convergent BFP. A 2048-point pipeline FFT has been fabricated in a standard-CMOS process from AMI Semiconductor (Lenart and Öwall, 2003), and a field-programmable gate array prototype integrating a 2-D FFT core in a larger design shows that the architecture is suitable for image reconstruction in digital holographic imaging.}}, author = {{Lenart, Thomas and Öwall, Viktor}}, issn = {{1063-8210}}, keywords = {{multiplexing (OFDM); orthogonal frequency-division; transform (FFT); hybrid floating point; fast Fourier; dynamic data scaling; digital video broadcasting (DVB); digital holography; block floating point (BFP); convergent BFP (CBFP)}}, language = {{eng}}, number = {{11}}, pages = {{1286--1290}}, publisher = {{IEEE - Institute of Electrical and Electronics Engineers Inc.}}, series = {{IEEE Transactions on Very Large Scale Integration (VLSI) Systems}}, title = {{Architectures for Dynamic Data Scaling in 2/4/8K Pipeline FFT Cores}}, url = {{https://lup.lub.lu.se/search/files/4446011/1580334.pdf}}, doi = {{10.1109/TVLSI.2006.886407}}, volume = {{14}}, year = {{2006}}, }