Java to hardware compilation for non data flow applications
(2005) DSD'2005: 8th Euromicro Conference on Digital System Design 2005. p.330-337- Abstract
- Java has proven to he a powerful language for software development. In this paper we show that it is also suitable for hardware compilation, making it an attractive language for embedded system development. Our compilation technique, which is presented here, is based on separating different aspects of the program and use dedicated and specialised optimisations and code generators for each aspect. In this paper we focus on efficient implementation of random memory accesses, i.e. reference intensive tasks, such as graph traversal. We show that for these tasks the hardware generated by our compiler is up to 1.8 times faster than a software implementation. We also show how recursive algorithms can be mapped to hardware using our tool.
Please use this url to cite or link to this publication:
https://lup.lub.lu.se/record/615551
- author
- Andersson, Per LU and Kuchcinski, Krzysztof LU
- organization
- publishing date
- 2005
- type
- Chapter in Book/Report/Conference proceeding
- publication status
- published
- subject
- keywords
- Graph traversal, Hardware compilation, Reference intensive tasks, Software implementation
- host publication
- Proceedings - DSD'2005: 8th Euromicro Conference on Digital System Design - Architectures, Methods and Tools
- volume
- 2005
- pages
- 330 - 337
- publisher
- IEEE - Institute of Electrical and Electronics Engineers Inc.
- conference name
- DSD'2005: 8th Euromicro Conference on Digital System Design
- conference location
- Porto, Portugal
- conference dates
- 2005-08-30 - 2005-09-03
- external identifiers
-
- wos:000232302700053
- scopus:33845316909
- DOI
- 10.1109/DSD.2005.53
- language
- English
- LU publication?
- yes
- id
- 4ebbe8e8-6ec8-46b6-abc7-bc933a59163c (old id 615551)
- date added to LUP
- 2016-04-04 10:08:04
- date last changed
- 2022-01-29 19:48:20
@inproceedings{4ebbe8e8-6ec8-46b6-abc7-bc933a59163c, abstract = {{Java has proven to he a powerful language for software development. In this paper we show that it is also suitable for hardware compilation, making it an attractive language for embedded system development. Our compilation technique, which is presented here, is based on separating different aspects of the program and use dedicated and specialised optimisations and code generators for each aspect. In this paper we focus on efficient implementation of random memory accesses, i.e. reference intensive tasks, such as graph traversal. We show that for these tasks the hardware generated by our compiler is up to 1.8 times faster than a software implementation. We also show how recursive algorithms can be mapped to hardware using our tool.}}, author = {{Andersson, Per and Kuchcinski, Krzysztof}}, booktitle = {{Proceedings - DSD'2005: 8th Euromicro Conference on Digital System Design - Architectures, Methods and Tools}}, keywords = {{Graph traversal; Hardware compilation; Reference intensive tasks; Software implementation}}, language = {{eng}}, pages = {{330--337}}, publisher = {{IEEE - Institute of Electrical and Electronics Engineers Inc.}}, title = {{Java to hardware compilation for non data flow applications}}, url = {{http://dx.doi.org/10.1109/DSD.2005.53}}, doi = {{10.1109/DSD.2005.53}}, volume = {{2005}}, year = {{2005}}, }