A complete MP3 decoder on a chip
(2005) Proceedings. 2005 IEEE International Conference on Microelectronic Systems Education (MSE '05) p.103-104- Abstract
- The paper presents the results from a course project which focused on all levels in ASIC design flow by implementing a complete MP3 decoder. Two student teams developed a decoder targeting ASIC and FPGA, respectively. The ASIC decoder, fabricated in a 0.35 μm process from AMI Semiconductor, consumes 40 mW with a supply voltage of 2 V running at 12 MHz. The FPGA decoder has been implemented and verified on a Virtex-II platform
Please use this url to cite or link to this publication:
https://lup.lub.lu.se/record/616086
- author
- Hedberg, Hugo LU ; Lenart, Thomas LU and Svensson, Henrik LU
- organization
- publishing date
- 2005
- type
- Chapter in Book/Report/Conference proceeding
- publication status
- published
- subject
- keywords
- MP3 decoder, ASIC design flow, FPGA decoder, 0.35 micron, 12 MHz, 2 V, 40 mW, course project
- host publication
- Proceedings. 2005 IEEE International Conference on Microelectronic Systems Education
- pages
- 103 - 104
- publisher
- IEEE - Institute of Electrical and Electronics Engineers Inc.
- conference name
- Proceedings. 2005 IEEE International Conference on Microelectronic Systems Education (MSE '05)
- conference location
- Anaheim, CA, United States
- conference dates
- 2005-06-12 - 2005-06-14
- external identifiers
-
- wos:000230426500049
- scopus:33746145573
- ISBN
- 0-7695-2374-9
- DOI
- 10.1109/MSE.2005.6
- language
- English
- LU publication?
- yes
- id
- b42b51b8-49d5-49f9-b333-d70d04a39696 (old id 616086)
- date added to LUP
- 2016-04-04 11:03:53
- date last changed
- 2022-01-29 21:20:05
@inproceedings{b42b51b8-49d5-49f9-b333-d70d04a39696, abstract = {{The paper presents the results from a course project which focused on all levels in ASIC design flow by implementing a complete MP3 decoder. Two student teams developed a decoder targeting ASIC and FPGA, respectively. The ASIC decoder, fabricated in a 0.35 μm process from AMI Semiconductor, consumes 40 mW with a supply voltage of 2 V running at 12 MHz. The FPGA decoder has been implemented and verified on a Virtex-II platform}}, author = {{Hedberg, Hugo and Lenart, Thomas and Svensson, Henrik}}, booktitle = {{Proceedings. 2005 IEEE International Conference on Microelectronic Systems Education}}, isbn = {{0-7695-2374-9}}, keywords = {{MP3 decoder; ASIC design flow; FPGA decoder; 0.35 micron; 12 MHz; 2 V; 40 mW; course project}}, language = {{eng}}, pages = {{103--104}}, publisher = {{IEEE - Institute of Electrical and Electronics Engineers Inc.}}, title = {{A complete MP3 decoder on a chip}}, url = {{http://dx.doi.org/10.1109/MSE.2005.6}}, doi = {{10.1109/MSE.2005.6}}, year = {{2005}}, }