Reducing Leakage Power in Fixed Coefficient Arithmetic
(2007) IEEE 14th International Conference on Electronics, Circuits and Systems (ICECS 2007) p.306-309- Abstract
- Most of the power consumption has in the past been related to the dynamic activities, in a CMOS circuit. However, the static power, i.e. leakage, is a major contribution to the total power consumption, in present nano-meter scale technologies. This paper discusses static power reduction methodologies on architectural and arithmetical level. Novel arithmetic techniques to reduce the static power consumption in digital applications for nano-scale CMOS technologies are addressed. An arithmetic reduction of the static power consumption down to 5 % by using bit-serial arithmetic compared to bit-parallel is indicated.
Please use this url to cite or link to this publication:
https://lup.lub.lu.se/record/1033948
- author
- Nilsson, Peter LU
- organization
- publishing date
- 2007
- type
- Contribution to conference
- publication status
- published
- subject
- pages
- 306 - 309
- conference name
- IEEE 14th International Conference on Electronics, Circuits and Systems (ICECS 2007)
- conference location
- Marrakech, Morocco
- conference dates
- 2007-12-11 - 2007-12-14
- external identifiers
-
- wos:000255014800076
- scopus:50649088183
- language
- English
- LU publication?
- yes
- id
- 4d27b070-baff-45f8-bf73-40e425a9860f (old id 1033948)
- date added to LUP
- 2016-04-04 14:06:20
- date last changed
- 2022-01-30 01:28:47
@misc{4d27b070-baff-45f8-bf73-40e425a9860f, abstract = {{Most of the power consumption has in the past been related to the dynamic activities, in a CMOS circuit. However, the static power, i.e. leakage, is a major contribution to the total power consumption, in present nano-meter scale technologies. This paper discusses static power reduction methodologies on architectural and arithmetical level. Novel arithmetic techniques to reduce the static power consumption in digital applications for nano-scale CMOS technologies are addressed. An arithmetic reduction of the static power consumption down to 5 % by using bit-serial arithmetic compared to bit-parallel is indicated.}}, author = {{Nilsson, Peter}}, language = {{eng}}, pages = {{306--309}}, title = {{Reducing Leakage Power in Fixed Coefficient Arithmetic}}, year = {{2007}}, }