Noise optimization of an inductively degenerated CMOS low noise amplifier
(2001) In IEEE Transactions on Circuits and Systems - 2, Analog and Digital Signal Processing 48(9). p.835-841- Abstract
- This paper presents a technique for substantially reducing the noise of a CMOS low noise amplifier implemented in the inductive source degeneration topology. The effects of the gate induced current noise on the noise performance are taken into account, and the total output noise is strongly reduced by inserting a capacitance of appropriate value in parallel with the amplifying MOS transistor of the LNA. As a result, very low noise figures become possible already at very low power consumption levels
Please use this url to cite or link to this publication:
https://lup.lub.lu.se/record/1035841
- author
- Andreani, Pietro LU and Sjöland, Henrik LU
- organization
- publishing date
- 2001
- type
- Contribution to journal
- publication status
- published
- subject
- in
- IEEE Transactions on Circuits and Systems - 2, Analog and Digital Signal Processing
- volume
- 48
- issue
- 9
- pages
- 835 - 841
- publisher
- IEEE - Institute of Electrical and Electronics Engineers Inc.
- external identifiers
-
- scopus:0035456082
- ISSN
- 1057-7130
- DOI
- 10.1109/82.964996
- language
- English
- LU publication?
- yes
- id
- 7b0d8f4f-9fe6-4e55-b21d-64b123c1a1e9 (old id 1035841)
- alternative location
- http://ieeexplore.ieee.org/iel5/82/20839/00964996.pdf
- date added to LUP
- 2016-04-04 09:30:29
- date last changed
- 2022-02-06 03:18:10
@article{7b0d8f4f-9fe6-4e55-b21d-64b123c1a1e9, abstract = {{This paper presents a technique for substantially reducing the noise of a CMOS low noise amplifier implemented in the inductive source degeneration topology. The effects of the gate induced current noise on the noise performance are taken into account, and the total output noise is strongly reduced by inserting a capacitance of appropriate value in parallel with the amplifying MOS transistor of the LNA. As a result, very low noise figures become possible already at very low power consumption levels}}, author = {{Andreani, Pietro and Sjöland, Henrik}}, issn = {{1057-7130}}, language = {{eng}}, number = {{9}}, pages = {{835--841}}, publisher = {{IEEE - Institute of Electrical and Electronics Engineers Inc.}}, series = {{IEEE Transactions on Circuits and Systems - 2, Analog and Digital Signal Processing}}, title = {{Noise optimization of an inductively degenerated CMOS low noise amplifier}}, url = {{http://dx.doi.org/10.1109/82.964996}}, doi = {{10.1109/82.964996}}, volume = {{48}}, year = {{2001}}, }