Advanced

Analysis and design of a 1.8-GHz CMOS LC quadrature VCO

Andreani, Pietro LU ; Bonfanti, A; Romano, L and Samori, C (2002) In IEEE Journal of Solid-State Circuits 37(12). p.1737-1747
Abstract
This paper presents a quadrature voltage-controlled oscillator (QVCO) based on the coupling of two LC-tank VCOs. A simplified theoretical analysis for the oscillation frequency and phase noise displayed by the QVCO in the 1/f/sup 3/ region is developed, and good agreement is found between theory and simulation results. A prototype for the QVCO was implemented in a 0.35-/spl mu/m CMOS process with three standard metal layers. The QVCO could be tuned between 1.64 and 1.97 GHz, and showed a phase noise of -140 dBc/Hz or less across the tuning range at a 3-MHz offset frequency from the carrier, for a current consumption of 25 mA from a 2-V power supply. The equivalent phase error between I and Q signals was at most 0.25/spl deg/.
Please use this url to cite or link to this publication:
author
organization
publishing date
type
Contribution to journal
publication status
published
subject
in
IEEE Journal of Solid-State Circuits
volume
37
issue
12
pages
1737 - 1747
publisher
IEEE--Institute of Electrical and Electronics Engineers Inc.
external identifiers
  • scopus:0036918499
ISSN
0018-9200
DOI
10.1109/JSSC.2002.804352
language
English
LU publication?
yes
id
a5b395fe-b53f-4625-9cdd-2bd6eb7cb286 (old id 1049725)
date added to LUP
2008-03-20 12:16:56
date last changed
2017-11-19 04:12:18
@article{a5b395fe-b53f-4625-9cdd-2bd6eb7cb286,
  abstract     = {This paper presents a quadrature voltage-controlled oscillator (QVCO) based on the coupling of two LC-tank VCOs. A simplified theoretical analysis for the oscillation frequency and phase noise displayed by the QVCO in the 1/f/sup 3/ region is developed, and good agreement is found between theory and simulation results. A prototype for the QVCO was implemented in a 0.35-/spl mu/m CMOS process with three standard metal layers. The QVCO could be tuned between 1.64 and 1.97 GHz, and showed a phase noise of -140 dBc/Hz or less across the tuning range at a 3-MHz offset frequency from the carrier, for a current consumption of 25 mA from a 2-V power supply. The equivalent phase error between I and Q signals was at most 0.25/spl deg/.},
  author       = {Andreani, Pietro and Bonfanti, A and Romano, L and Samori, C},
  issn         = {0018-9200},
  language     = {eng},
  number       = {12},
  pages        = {1737--1747},
  publisher    = {IEEE--Institute of Electrical and Electronics Engineers Inc.},
  series       = {IEEE Journal of Solid-State Circuits},
  title        = {Analysis and design of a 1.8-GHz CMOS LC quadrature VCO},
  url          = {http://dx.doi.org/10.1109/JSSC.2002.804352},
  volume       = {37},
  year         = {2002},
}