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A 10-bit pipeline ADC using 40-dB opamps and calibrated customized references

Chen, Cheng and Yuan, Jiren LU (2007) 7th International Conference on ASIC In 7th International Conference on ASIC, 2007. ASICON '07 p.249-252
Abstract
A 10-bit pipeline A/D converter using low gain (<= 40 dB) operational amplifiers (opamps) is presented. Without. interfering the normal analog-to-digital conversion, a continuous reference refreshing technique is exploited. This technique effectively reduces the gain requirement of opamp while the conversion speed is not compromised, allowing the use of simple cascode CMOS inverters. The compensation of finite gain of the opamp is made by using customized reference voltages that is calibrated periodically. The technique has been confirmed by intensive simulations. As a result of the relaxed opamp gain requirement, significant reduction in power consumption can be achieved.
Please use this url to cite or link to this publication:
author
organization
publishing date
type
Chapter in Book/Report/Conference proceeding
publication status
published
subject
keywords
finite opamp gain, pipeline A/D converter, calibration, reference, refreshing
in
7th International Conference on ASIC, 2007. ASICON '07
pages
249 - 252
publisher
IEEE--Institute of Electrical and Electronics Engineers Inc.
conference name
7th International Conference on ASIC
external identifiers
  • WOS:000253449900059
  • Scopus:48349086562
ISBN
978-1-4244-1132-0
DOI
10.1109/ICASIC.2007.4415614
language
English
LU publication?
yes
id
04f89475-96c5-43ed-8aa6-4e877497d357 (old id 1407429)
date added to LUP
2009-05-29 15:54:52
date last changed
2017-01-01 07:58:34
@inproceedings{04f89475-96c5-43ed-8aa6-4e877497d357,
  abstract     = {A 10-bit pipeline A/D converter using low gain (&lt;= 40 dB) operational amplifiers (opamps) is presented. Without. interfering the normal analog-to-digital conversion, a continuous reference refreshing technique is exploited. This technique effectively reduces the gain requirement of opamp while the conversion speed is not compromised, allowing the use of simple cascode CMOS inverters. The compensation of finite gain of the opamp is made by using customized reference voltages that is calibrated periodically. The technique has been confirmed by intensive simulations. As a result of the relaxed opamp gain requirement, significant reduction in power consumption can be achieved.},
  author       = {Chen, Cheng and Yuan, Jiren},
  booktitle    = {7th International Conference on ASIC, 2007. ASICON '07},
  isbn         = {978-1-4244-1132-0},
  keyword      = {finite opamp gain,pipeline A/D converter,calibration,reference,refreshing},
  language     = {eng},
  pages        = {249--252},
  publisher    = {IEEE--Institute of Electrical and Electronics Engineers Inc.},
  title        = {A 10-bit pipeline ADC using 40-dB opamps and calibrated customized references},
  url          = {http://dx.doi.org/10.1109/ICASIC.2007.4415614},
  year         = {2007},
}