Novel carry propagation in high-speed synchronous counters and dividers
(1993) In Electronics Letters 29(16). p.1457-1458- Abstract
- A high-speed binary counter and a divider using a new carry propagation scheme is presented. The critical logic depth is one and the maximum fan-in of gates can be reduced to two, independent of the number of bits in both the counter and the divider. The hardware grows linearly with the number of bits, making them well suited for a wide range of applications.
Please use this url to cite or link to this publication:
https://lup.lub.lu.se/record/1748991
- author
- Larsson, Patrik and Yuan, Jiren LU
- publishing date
- 1993
- type
- Contribution to journal
- publication status
- published
- subject
- in
- Electronics Letters
- volume
- 29
- issue
- 16
- pages
- 1457 - 1458
- publisher
- IEE
- external identifiers
-
- scopus:0027909751
- ISSN
- 1350-911X
- DOI
- 10.1049/el:19930975
- language
- English
- LU publication?
- no
- id
- 7714956e-40d0-4fc6-93fe-589c2d326049 (old id 1748991)
- date added to LUP
- 2016-04-04 09:22:55
- date last changed
- 2021-08-22 04:59:12
@article{7714956e-40d0-4fc6-93fe-589c2d326049, abstract = {{A high-speed binary counter and a divider using a new carry propagation scheme is presented. The critical logic depth is one and the maximum fan-in of gates can be reduced to two, independent of the number of bits in both the counter and the divider. The hardware grows linearly with the number of bits, making them well suited for a wide range of applications.}}, author = {{Larsson, Patrik and Yuan, Jiren}}, issn = {{1350-911X}}, language = {{eng}}, number = {{16}}, pages = {{1457--1458}}, publisher = {{IEE}}, series = {{Electronics Letters}}, title = {{Novel carry propagation in high-speed synchronous counters and dividers}}, url = {{http://dx.doi.org/10.1049/el:19930975}}, doi = {{10.1049/el:19930975}}, volume = {{29}}, year = {{1993}}, }