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Novel carry propagation in high-speed synchronous counters and dividers

Larsson, Patrik and Yuan, Jiren LU (1993) In Electronics Letters 29(16). p.1457-1458
Abstract
A high-speed binary counter and a divider using a new carry propagation scheme is presented. The critical logic depth is one and the maximum fan-in of gates can be reduced to two, independent of the number of bits in both the counter and the divider. The hardware grows linearly with the number of bits, making them well suited for a wide range of applications.
Please use this url to cite or link to this publication:
author
publishing date
type
Contribution to journal
publication status
published
subject
in
Electronics Letters
volume
29
issue
16
pages
1457 - 1458
publisher
IEE
external identifiers
  • Scopus:0027909751
ISSN
1350-911X
DOI
10.1049/el:19930975
language
English
LU publication?
no
id
7714956e-40d0-4fc6-93fe-589c2d326049 (old id 1748991)
date added to LUP
2010-12-22 16:09:44
date last changed
2017-01-01 07:47:50
@article{7714956e-40d0-4fc6-93fe-589c2d326049,
  abstract     = {A high-speed binary counter and a divider using a new carry propagation scheme is presented. The critical logic depth is one and the maximum fan-in of gates can be reduced to two, independent of the number of bits in both the counter and the divider. The hardware grows linearly with the number of bits, making them well suited for a wide range of applications.},
  author       = {Larsson, Patrik and Yuan, Jiren},
  issn         = {1350-911X},
  language     = {eng},
  number       = {16},
  pages        = {1457--1458},
  publisher    = {IEE},
  series       = {Electronics Letters},
  title        = {Novel carry propagation in high-speed synchronous counters and dividers},
  url          = {http://dx.doi.org/10.1049/el:19930975},
  volume       = {29},
  year         = {1993},
}