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A 700-MHZ 24-bit pipelined accumulator in 1.2-um CMOS for application as a numerically controlled oscillator

Lu, Fang; Samueli, Henry; Yuan, Jiren LU and Svensson, Christer (1993) In IEEE Journal of Solid-State Circuits 28(8). p.878-886
Abstract
To accomplish timing recovery/synthesis in high-speed communication systems, a 24-b numerically controlled oscillator (NCO) IC using a circuit design technique called true single-phase clock (TSPC) pipelined CMOS has been fabricated in a standard 1.2-μm CMOS process. The device achieves a maximum tested input clock rate of 700 MHz, which results in an output frequency tuning range from DC up to 350 MHz with a 41.7-Hz tuning resolution and a peak-to-peak phase jitter of 1.4 ns. The 1.7-mm×1.7-mm IC dissipates 850 mW with a single 5-V supply, which is substantially lower than similar ECL and GaAs devices
Please use this url to cite or link to this publication:
author
publishing date
type
Contribution to journal
publication status
published
subject
in
IEEE Journal of Solid-State Circuits
volume
28
issue
8
pages
878 - 886
publisher
IEEE--Institute of Electrical and Electronics Engineers Inc.
external identifiers
  • Scopus:0027642117
ISSN
0018-9200
DOI
10.1109/4.231324
language
English
LU publication?
no
id
fe82870f-9258-4b97-ab6d-e528e20fab04 (old id 1757679)
date added to LUP
2011-01-03 13:49:22
date last changed
2017-02-26 04:26:12
@article{fe82870f-9258-4b97-ab6d-e528e20fab04,
  abstract     = {To accomplish timing recovery/synthesis in high-speed communication systems, a 24-b numerically controlled oscillator (NCO) IC using a circuit design technique called true single-phase clock (TSPC) pipelined CMOS has been fabricated in a standard 1.2-μm CMOS process. The device achieves a maximum tested input clock rate of 700 MHz, which results in an output frequency tuning range from DC up to 350 MHz with a 41.7-Hz tuning resolution and a peak-to-peak phase jitter of 1.4 ns. The 1.7-mm×1.7-mm IC dissipates 850 mW with a single 5-V supply, which is substantially lower than similar ECL and GaAs devices},
  author       = {Lu, Fang and Samueli, Henry and Yuan, Jiren and Svensson, Christer},
  issn         = {0018-9200},
  language     = {eng},
  number       = {8},
  pages        = {878--886},
  publisher    = {IEEE--Institute of Electrical and Electronics Engineers Inc.},
  series       = {IEEE Journal of Solid-State Circuits},
  title        = {A 700-MHZ 24-bit pipelined accumulator in 1.2-um CMOS for application as a numerically controlled oscillator},
  url          = {http://dx.doi.org/10.1109/4.231324},
  volume       = {28},
  year         = {1993},
}