Single input current-sensing differential logic (SCSDL)
(2000) IEEE International Symposium on Circuits and Systems (ISCAS), 2000 1. p.764-767- Abstract
- A new novel single input current-sensing differential logic (SCSDL) is proposed. The SCSDL is flexible-in particular high input Boolean logic functions can be implemented with low complexity, area consumption, time delay, and power consumption. The first part of the area saving comes from the remarkable reduction of wiring; the other part comes from the very low number of transistors needed to implement a complex Boolean function, compared with other types of logic (e.g. CRDL, CSDL, DCVSL, static logic). Since this logic relies on comparison of currents in two branches, mismatch could ruin the function. The yield of the logic is good for a high performance process referred to mismatch.
Please use this url to cite or link to this publication:
https://lup.lub.lu.se/record/1761998
- author
- Strandberg, Roland LU and Yuan, Jiren LU
- organization
- publishing date
- 2000
- type
- Chapter in Book/Report/Conference proceeding
- publication status
- published
- subject
- host publication
- Proceedings of 2000 IEEE International Symposium on Circuits and Systems
- volume
- 1
- pages
- 764 - 767
- conference name
- IEEE International Symposium on Circuits and Systems (ISCAS), 2000
- conference location
- Geneva, Switzerland
- conference dates
- 2000-05-28 - 2000-05-31
- external identifiers
-
- scopus:0033681668
- ISBN
- 0-7803-5482-6
- DOI
- 10.1109/ISCAS.2000.857208
- language
- English
- LU publication?
- yes
- id
- 576d4c4c-6544-4140-989c-1e837d98e3a2 (old id 1761998)
- date added to LUP
- 2016-04-04 14:08:22
- date last changed
- 2022-01-30 01:28:53
@inproceedings{576d4c4c-6544-4140-989c-1e837d98e3a2, abstract = {{A new novel single input current-sensing differential logic (SCSDL) is proposed. The SCSDL is flexible-in particular high input Boolean logic functions can be implemented with low complexity, area consumption, time delay, and power consumption. The first part of the area saving comes from the remarkable reduction of wiring; the other part comes from the very low number of transistors needed to implement a complex Boolean function, compared with other types of logic (e.g. CRDL, CSDL, DCVSL, static logic). Since this logic relies on comparison of currents in two branches, mismatch could ruin the function. The yield of the logic is good for a high performance process referred to mismatch.}}, author = {{Strandberg, Roland and Yuan, Jiren}}, booktitle = {{Proceedings of 2000 IEEE International Symposium on Circuits and Systems}}, isbn = {{0-7803-5482-6}}, language = {{eng}}, pages = {{764--767}}, title = {{Single input current-sensing differential logic (SCSDL)}}, url = {{http://dx.doi.org/10.1109/ISCAS.2000.857208}}, doi = {{10.1109/ISCAS.2000.857208}}, volume = {{1}}, year = {{2000}}, }