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A 1 GHz CMOS current-folded direct digital RF quadrature modulator

Yijun, Zhou LU and Yuan, Jiren LU (2005) IEEE Radio Frequency integrated Circuits (RFIC) Symposium. p.25-28
Abstract
This paper describes a CMOS current-folded direct digital RF quadrature modulator, which uses two 10-bit linear interpolation current steering digital-to-analog converters (DACs) and two current-folded double-balanced mixers. The attenuation of the DAC image components is significantly increased with linear interpolation, and the reconstruction filter is therefore eliminated. The DAC baseband differential current signals are fed to the mixer by current-folded structures, which realize the low voltage design and improve the linearity of the modulated RF signal. The chip has been implemented with a 0.35 /spl mu/m, double-poly and triple-metal CMOS process.
Please use this url to cite or link to this publication:
author
and
organization
publishing date
type
Chapter in Book/Report/Conference proceeding
publication status
published
subject
keywords
CMOS integrated circuits, digital-analogue conversion, UHF mixers, interpolation, modulators, UHF integrated circuits
host publication
Digest of Papers. 2005 IEEE Radio Frequency integrated Circuits (RFIC) Symposium.
pages
25 - 28
conference name
IEEE Radio Frequency integrated Circuits (RFIC) Symposium.
conference dates
2005-06-12 - 2005-06-14
external identifiers
  • scopus:27644506458
ISSN
1529-2517
ISBN
0-7803-8983-2
DOI
10.1109/RFIC.2005.1489177
language
English
LU publication?
yes
id
1ab3f76b-d65c-4f38-9686-623aa620d581 (old id 603221)
date added to LUP
2016-04-04 09:41:16
date last changed
2022-03-15 20:29:13
@inproceedings{1ab3f76b-d65c-4f38-9686-623aa620d581,
  abstract     = {{This paper describes a CMOS current-folded direct digital RF quadrature modulator, which uses two 10-bit linear interpolation current steering digital-to-analog converters (DACs) and two current-folded double-balanced mixers. The attenuation of the DAC image components is significantly increased with linear interpolation, and the reconstruction filter is therefore eliminated. The DAC baseband differential current signals are fed to the mixer by current-folded structures, which realize the low voltage design and improve the linearity of the modulated RF signal. The chip has been implemented with a 0.35 /spl mu/m, double-poly and triple-metal CMOS process.}},
  author       = {{Yijun, Zhou and Yuan, Jiren}},
  booktitle    = {{Digest of Papers. 2005 IEEE Radio Frequency integrated Circuits (RFIC) Symposium.}},
  isbn         = {{0-7803-8983-2}},
  issn         = {{1529-2517}},
  keywords     = {{CMOS integrated circuits; digital-analogue conversion; UHF mixers; interpolation; modulators; UHF integrated circuits}},
  language     = {{eng}},
  pages        = {{25--28}},
  title        = {{A 1 GHz CMOS current-folded direct digital RF quadrature modulator}},
  url          = {{http://dx.doi.org/10.1109/RFIC.2005.1489177}},
  doi          = {{10.1109/RFIC.2005.1489177}},
  year         = {{2005}},
}