Harmonic Rejection Mixer at ADC Input for Complex IF Dual Carrier Receiver Architecture
(2012) IEEE International Symposium on RF Integrated Circuits (RFIC) p.265-268- Abstract
- This paper presents a receiver architecture for intraband
dual-carrier reception as specified for the upcoming
releases of 3GPP WCDMA and LTE standards. It is based on a
time-discrete harmonic rejection complex-IF mixer to limit the
bandwidth requirements on the ADCs to that of a single carrier.
The mixer has been designed and fabricated together with a 3rd
order continuous-time (CT) delta-sigma ADC for proof-of-concept
evaluation. Measurements show at least 68dB
rejection at 2nd to 4th LO harmonic.
Please use this url to cite or link to this publication:
https://lup.lub.lu.se/record/2172576
- author
- Sundström, Lars LU ; Andersson, Martin LU ; Andersson, Mattias LU and Andreani, Pietro LU
- organization
- publishing date
- 2012
- type
- Chapter in Book/Report/Conference proceeding
- publication status
- published
- subject
- host publication
- Radio Frequency Integrated Circuits Symposium (RFIC), 2012
- pages
- 265 - 268
- publisher
- IEEE - Institute of Electrical and Electronics Engineers Inc.
- conference name
- IEEE International Symposium on RF Integrated Circuits (RFIC)
- conference location
- Montreal, Canada
- conference dates
- 2012-05-20 - 2012-05-23
- external identifiers
-
- scopus:84866622335
- ISBN
- 978-1-4673-0415-3
- DOI
- 10.1109/RFIC.2012.6242278
- language
- English
- LU publication?
- yes
- id
- 3982d9b6-33fb-4eb4-baeb-5e47e6bc687a (old id 2172576)
- date added to LUP
- 2016-04-04 10:49:02
- date last changed
- 2022-01-29 20:53:09
@inproceedings{3982d9b6-33fb-4eb4-baeb-5e47e6bc687a, abstract = {{This paper presents a receiver architecture for intraband<br/><br> dual-carrier reception as specified for the upcoming<br/><br> releases of 3GPP WCDMA and LTE standards. It is based on a<br/><br> time-discrete harmonic rejection complex-IF mixer to limit the<br/><br> bandwidth requirements on the ADCs to that of a single carrier.<br/><br> The mixer has been designed and fabricated together with a 3rd<br/><br> order continuous-time (CT) delta-sigma ADC for proof-of-concept<br/><br> evaluation. Measurements show at least 68dB<br/><br> rejection at 2nd to 4th LO harmonic.}}, author = {{Sundström, Lars and Andersson, Martin and Andersson, Mattias and Andreani, Pietro}}, booktitle = {{Radio Frequency Integrated Circuits Symposium (RFIC), 2012}}, isbn = {{978-1-4673-0415-3}}, language = {{eng}}, pages = {{265--268}}, publisher = {{IEEE - Institute of Electrical and Electronics Engineers Inc.}}, title = {{Harmonic Rejection Mixer at ADC Input for Complex IF Dual Carrier Receiver Architecture}}, url = {{http://dx.doi.org/10.1109/RFIC.2012.6242278}}, doi = {{10.1109/RFIC.2012.6242278}}, year = {{2012}}, }